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MT25QL128ABA1EW7-0SIT

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Micron Tech Pre-ordered Products, DFN-8(5x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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MT25QL128ABA1EW7-0SIT

Micron Tech · Pre-ordered Products · DFN-8(5x6)

MT25QL128ABA1EW7-0SIT from Micron Tech, in a DFN-8(5x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S# input Chip select: driving S# HIGH puts the device in standby (unless an internal program, erase or write status register cycle is in progress) and tri-states outputs, and driving it LOW enables the device; a falling edge is required before any command after power-up.
2 DQ1 bidirectional Serial I/O bit 1 carrying address, data and command information; it is an output for legacy x1 commands in XIO-SPI and an I/O for dual and quad operation.
3 W#/DQ2 bidirectional Write protect input that freezes the status register when its enable bit is 1 and W# is LOW, and serves as DQ2 I/O in quad modes; it has no internal pull-up, cannot be left floating and must be driven.
4 VSS power_in Core and I/O ground connection.
5 DQ0 bidirectional Serial I/O bit 0 carrying address, data and command information; it is an input for legacy x1 commands in XIO-SPI and an I/O for dual and quad operation.
6 C input Serial clock that times the interface: commands are latched on the rising edge, and in STR address/data are latched on the rising edge with data output on the falling edge, while in DTR both edges are used.
7 DQ3/HOLD# bidirectional Serial I/O bit 3 shared with HOLD# input, which pauses serial communication without deselecting the device (HOLD# is disabled in QIO-SPI mode or DTR operation); DQ3 must be driven HIGH or pulled up during single and dual I/O commands.
8 VCC power_in Core and I/O power supply (2.7-3.6V for the L voltage option).
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Micron Tech
Package DFN-8(5x6)
Category Electronic Tools/Instruments/Consumables
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 2.7 3.6 V 81
Ambient operating temperature TA -40 85 °C 81
Storage temperature TSTG -65 150 °C 81
Supply voltage VCC -0.6 4 V 81
Electrostatic discharge voltage (HBM) VESD -2000 2000 V 81
Input/output capacitance (DQ0/DQ1/DQ2/DQ3) CIN/OUT 10 pF 81
Input capacitance (other pins) CIN 6 pF 81
Input/Chip select capacitance CIN/S# 10 pF 81
Load capacitance CL 30 pF 82
Input rise and fall times 1.5 ns 82
Input leakage current ILI -2 2 µA 83
Output leakage current ILO -2 2 µA 83
Standby current (IT range) ICC1 15 50 µA S# = VCC, VIN = VSS or VCC 83
Deep power-down current (IT range) ICC2 5 30 µA S# = VCC, VIN = VSS or VCC 83
Operating current (fast-read extended I/O) ICC3 16 mA C = 0.1VCC/0.9VCC at 133 MHz, DQ1 = open 83
Operating current (fast-read extended I/O) ICC3 8 mA C = 0.1VCC/0.9VCC at 54 MHz, DQ1 = open 83
Operating current (fast-read dual I/O) ICC3 20 mA C = 0.1VCC/0.9VCC at 133 MHz, DQ1 = open 83
Operating current (fast-read quad I/O) ICC3 22 mA C = 0.1VCC/0.9VCC at 133 MHz, DQ1 = open 83
Operating current (fast-read quad I/O DTR) ICC3 28 mA C = 0.1VCC / 0.9VCC at 80 MHz DTR, DQ=open 83
Operating current (fast-read quad I/O DTR) ICC3 31 mA C = 0.1VCC / 0.9VCC at 90 MHz DTR, DQ=open 83
Operating current (PROGRAM operations) ICC4 35 mA S# = VCC 83
Operating current (WRITE operations) ICC5 35 mA S# = VCC 83
Operating current (erase) ICC6 35 mA S# = VCC 83
Output low voltage VOL 0.4 V IOL = 1.6mA 84
Clock frequency, all commands other than READ (STR) fC 133 MHz STR 85
Clock frequency, all commands other than READ (DTR) fC 90 MHz DTR 85
Clock frequency for READ command (03h) (STR) fR 54 MHz STR 85
Clock frequency for READ command (03h) (DTR) fR 27 MHz DTR 85
Clock HIGH time (STR) tCH 3.375 ns STR 85
Clock HIGH time (DTR) tCH 5 ns DTR 85
Clock LOW time (STR) tCL 3.375 ns STR 85
Clock LOW time (DTR) tCL 5 ns DTR 85
S# active setup time tSLCH 3.375 ns STR/DTR 85
S# not active hold time tCHSL 3.375 ns STR/DTR 85
Data in setup time (STR) tDVCH 1.75 ns STR 85
Data in hold time tCHDX 2.3 ns STR/DTR 85
S# deselect time after a READ command tSHSL1 20 ns STR/DTR 85
S# deselect time after a nonREAD command tSHSL2 50 ns STR/DTR 85
Output disable time tSHQZ 7 ns STR/DTR 85
Clock LOW to output valid under 30pF tCLQV 6 ns STR/DTR 85
Clock LOW to output valid under 10pF tCLQV 5 ns STR/DTR 85
Output hold time tCLQX 1.5 ns STR/DTR 85
Write protect setup time tWHSL 20 ns STR/DTR 86
Write protect hold time tSHWL 100 ns STR/DTR 86
S# HIGH to deep power-down tDP 3 µs STR/DTR 86
S# HIGH to standby mode (DPD exit time) tRDP 30 µs STR/DTR 86
WRITE STATUS REGISTER cycle time tW 1.3 8 ms STR/DTR 86
WRITE NONVOLATILE CONFIGURATION REGISTER cycle time tWNVCR 0.2 1 s STR/DTR 86
Page program time (256 bytes) tPP 120 1800 µs STR/DTR 86
PROGRAM OTP cycle time (64 bytes) tPOTP 0.12 0.8 ms STR/DTR 86
Sector erase time tSE 0.15 1 s STR/DTR 86
4KB subsector erase time tSSE 0.05 0.4 s STR/DTR 86
32KB subsector erase time tSSE 0.1 1 s STR/DTR 86
128Mb bulk erase time tBE 38 114 s STR/DTR 86
Reset pulse width tRLRH 50 ns 87
Suspend latency (Program) 7 25 µs Program 91
Suspend latency (Subsector erase) 15 30 µs Subsector erase 91
Suspend latency (Erase) 15 30 µs Erase 91

CAD (KiCad official)

  • Symbol: MT25QL128ABA1EW7-0SIT
  • Footprint: Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm
  • 3D model: DFN-8(5x6) (KiCad packages3D, STEP)
  • 3D model files: mt25ql128aba1ew7-0sit-etched.step / mt25ql128aba1ew7-0sit-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mt25ql128aba1ew7-0sit.step / mt25ql128aba1ew7-0sit.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Micron Tech datasheet (93 pp, sha256 1cbf328ecd1ee6f0, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF