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MST5450BTS

Public Made by Adom

by adom

MST Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MST5450BTS

MST · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3

MST5450BTS from MST, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Chip ground pin; the datasheet requires wide copper traces on VIN and GND and the input and output capacitors to be placed as close to the chip as possible.
2 VIN power_in Input supply pin with a 3V to 45V operating range (45V transient capability); absolute maximum VIN to GND is 55V and VIN to VOUT is 50V, and a 1uF input capacitor is recommended between VIN and GND.
3 VOUT power_out Regulated output pin for the fixed 1.8V, 3.0V, 3.3V or 5.0V versions, rated for up to 350mA, requiring a minimum 10uF ceramic (X5R or X7R) output capacitor placed close to VOUT and GND.

Key specifications

Parameter Value
Manufacturer MST
Package SOT-89-3
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage VIN 3 45 V 4
Quiescent current IGND 2.5 2.8 3.2 uA VIN=12V，No load 4
Output current IOUT_MAX 350 mA 4
EN high level VENH 1 V 开启 (enable) 4
EN low level VENL 0.4 V 关断 (shutdown) 4
Output voltage accuracy VOUT -2 2 % VIN=12V，IOUT=10mA; relative to VOUTNOM 4
Recommended minimum output capacitance COUT 10 uF Ceramic capacitor, X5R or X7R recommended 6
Series resistor in front of input capacitor (high-voltage input) 1 Ω VIN ≥18V; resistor value adjusted to application 6
VIN to GND voltage VIN ~ GND -0.3 55 V 3
VOUT to GND voltage VOUT ~ GND -0.3 7 V 3
VIN to VOUT voltage VIN ~ VOUT -0.3 50 V 3
EN to GND voltage EN ~ GND -0.3 55 V 3
Operating junction temperature -40 125 ℃ 3
Storage temperature -40 150 ℃ 3
ESD human body model (HBM) VESD 4 KV Human body model (HBM) 3
Package thermal resistance, junction to ambient 130 ℃/W SOT89-3 package 3
Package maximum allowable power dissipation 900 mW SOT89-3 package 3

CAD (KiCad official)

  • Symbol: MST5450BTS
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3 (KiCad packages3D, STEP)
  • 3D model files: mst5450bts-etched.step / mst5450bts-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mst5450bts.step / mst5450bts.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MST datasheet (14 pp, sha256 4228e4a6a0aa11db, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF