component
MST5433BTG
Public Made by Adomby adom
MST Linear Voltage Regulators (LDO), SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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MST5433BTG
MST · Linear Voltage Regulators (LDO) · SOT-23-5
MST5433BTG from MST, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input pin; the input voltage range is 3V to 45V (45V transient), and a 1uF capacitor should be placed between VIN and GND as close to the chip as possible. |
| 2 | GND | power_in | Chip ground; wide copper traces are recommended for both VIN and GND on the PCB. |
| 3 | EN | input | Enable pin that turns the LDO on (VENH minimum 1V) and off (VENL maximum 0.4V); it is open-drain and must not be left floating, so tie it to VIN when not used. |
| 4 | NC | unconnected | Empty pin with no internal connection. |
| 5 | VOUT | power_out | Regulated output (fixed 1.8V, 3.0V, 3.3V or 5.0V, ±2% accuracy, maximum output current 350mA); a ceramic output capacitor of at least 10uF (X5R or X7R) is recommended, placed close to VOUT and GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MST |
| Package | SOT-23-5 |
| Category | Power Management ICs |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN | 3 | 45 | V | 4 | ||
| Quiescent current | IGND | 2.5 | 2.8 | 3.2 | uA | VIN=12V,No load | 4 |
| Output current | IOUT_MAX | 350 | mA | 4 | |||
| EN high level (enable) | VENH | 1 | V | 开启 | 4 | ||
| EN low level (shutdown) | VENL | 0.4 | V | 关断 | 4 | ||
| Output voltage accuracy (printed as ±2%) | -2 | 2 | % | 1 | |||
| VIN ~ GND absolute maximum voltage | VIN | -0.3 | 55 | V | VIN ~ GND | 3 | |
| VOUT ~ GND absolute maximum voltage | VOUT | -0.3 | 7 | V | VOUT ~ GND | 3 | |
| VIN ~ VOUT absolute maximum voltage | VIN-VOUT | -0.3 | 50 | V | VIN ~ VOUT | 3 | |
| EN ~ GND absolute maximum voltage | EN | -0.3 | 55 | V | EN ~ GND | 3 | |
| Operating junction temperature | -40 | 125 | ℃ | 3 | |||
| Storage temperature | -40 | 150 | ℃ | 3 | |||
| ESD Human Body Model (HBM) | VESD | 4 | KV | 人体模式(HBM) | 3 | ||
| Package thermal resistance, SOT23-5 | 200 | ℃/W | SOT23-5 package | 3 | |||
| Maximum allowable package power dissipation, SOT23-5 | 600 | mW | SOT23-5 package | 3 |
CAD (KiCad official)
- Symbol:
MST5433BTG - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
mst5433btg-etched.step/mst5433btg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mst5433btg.step/mst5433btg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MST datasheet (14 pp, sha256
4228e4a6a0aa11db, retrieved 2026-11-05, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# MST5433BTG
**MST** · Linear Voltage Regulators (LDO) · SOT-23-5
MST5433BTG from MST, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input pin; the input voltage range is 3V to 45V (45V transient), and a 1uF capacitor should be placed between VIN and GND as close to the chip as possible. |
| 2 | GND | power_in | Chip ground; wide copper traces are recommended for both VIN and GND on the PCB. |
| 3 | EN | input | Enable pin that turns the LDO on (VENH minimum 1V) and off (VENL maximum 0.4V); it is open-drain and must not be left floating, so tie it to VIN when not used. |
| 4 | NC | unconnected | Empty pin with no internal connection. |
| 5 | VOUT | power_out | Regulated output (fixed 1.8V, 3.0V, 3.3V or 5.0V, ±2% accuracy, maximum output current 350mA); a ceramic output capacitor of at least 10uF (X5R or X7R) is recommended, placed close to VOUT and GND. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MST |
| Package | SOT-23-5 |
| Category | Power Management ICs |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN | 3 | | 45 | V | | 4 |
| Quiescent current | IGND | 2.5 | 2.8 | 3.2 | uA | VIN=12V,No load | 4 |
| Output current | IOUT_MAX | 350 | | | mA | | 4 |
| EN high level (enable) | VENH | 1 | | | V | 开启 | 4 |
| EN low level (shutdown) | VENL | | | 0.4 | V | 关断 | 4 |
| Output voltage accuracy (printed as ±2%) | | -2 | | 2 | % | | 1 |
| VIN ~ GND absolute maximum voltage | VIN | -0.3 | | 55 | V | VIN ~ GND | 3 |
| VOUT ~ GND absolute maximum voltage | VOUT | -0.3 | | 7 | V | VOUT ~ GND | 3 |
| VIN ~ VOUT absolute maximum voltage | VIN-VOUT | -0.3 | | 50 | V | VIN ~ VOUT | 3 |
| EN ~ GND absolute maximum voltage | EN | -0.3 | | 55 | V | EN ~ GND | 3 |
| Operating junction temperature | | -40 | | 125 | ℃ | | 3 |
| Storage temperature | | -40 | | 150 | ℃ | | 3 |
| ESD Human Body Model (HBM) | VESD | | | 4 | KV | 人体模式(HBM) | 3 |
| Package thermal resistance, SOT23-5 | | | 200 | | ℃/W | SOT23-5 package | 3 |
| Maximum allowable package power dissipation, SOT23-5 | | | 600 | | mW | SOT23-5 package | 3 |
## CAD (KiCad official)
- Symbol: `MST5433BTG`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `mst5433btg-etched.step` / `mst5433btg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mst5433btg.step` / `mst5433btg.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [MST datasheet](docs/mst5433btg-datasheet.pdf) (14 pp, sha256 `4228e4a6a0aa11db`, retrieved 2026-11-05, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/mst5433btg-datasheet.pdf)