Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

MSQ40P07D

Bruckewell · MOSFETs · SOP-8

MSQ40P07D from Bruckewell, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of MOSFET 1. Connect to the higher-potential rail for a P-channel device. Continuous IS up to -6.5 A; VSD max -1.2 V at IS = -6 A, VGS = 0 V.
2 G1 input Gate of MOSFET 1. Drive VGS = -4.5 V to -10 V for full enhancement; VGS(th) = -1.0 V to -2.5 V. Absolute maximum VGS = ±20 V; typical gate charge Qg = 9 nC at VGS = -4.5 V.
3 S2 passive Source of MOSFET 2. Independent of MOSFET 1 source; same electrical ratings (IS = -6.5 A continuous, VSD max -1.2 V).
4 G2 input Gate of MOSFET 2. Drive VGS = -4.5 V to -10 V for full enhancement; same VGS(th) = -1.0 V to -2.5 V and ±20 V absolute maximum as G1.
5 D2 passive Drain of MOSFET 2 (bonded together with pin 6 for current handling / thermal). VDS max = -40 V, BVDSS = -40 V min, RDS(on) = 40 mΩ typ. at VGS = -10 V.
6 D2 passive Drain of MOSFET 2 (bonded together with pin 5). Tie both pins together on the PCB to share drain current and improve thermal performance.
7 D1 passive Drain of MOSFET 1 (bonded together with pin 8). VDS max = -40 V, BVDSS = -40 V min, RDS(on) = 40 mΩ typ. at VGS = -10 V, ID = -6 A.
8 D1 passive Drain of MOSFET 1 (bonded together with pin 7). Tie both pins together on the PCB to share drain current and improve thermal dissipation.

Key specifications

Parameter Value
Manufacturer Bruckewell
Package SOP-8
Category Transistors/Thyristors
Pins 8

CAD (KiCad official)

  • Symbol: MSQ40P07D
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: msq40p07d-etched.step / msq40p07d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msq40p07d.step / msq40p07d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Bruckewell datasheet (None pp, sha256 5f113e578104caec, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF