# MSQ30P15

**Bruckewell** · MOSFETs · SOP-8

MSQ30P15 from Bruckewell, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source. Tied together with pins 2 and 3 for reduced package resistance and improved current handling. Continuous source current up to -15 A (TC=25°C). |
| 2 | S | passive | Source. Connected in parallel with pins 1 and 3 for lower source-lead resistance. |
| 3 | S | passive | Source. Connected in parallel with pins 1 and 2 for lower source-lead resistance. |
| 4 | G | input | Gate. Controls the P-channel MOSFET conduction. VGS(th) = -1.0 V to -2.5 V; absolute maximum VGS = ±20 V. Typical RDS(on) = 12 mΩ @ VGS = -10 V. |
| 5 | D | passive | Drain. Pins 5-8 are tied together for reduced drain-lead resistance and thermal path. Absolute maximum VDS = -30 V. |
| 6 | D | passive | Drain. Connected in parallel with pins 5, 7 and 8. |
| 7 | D | passive | Drain. Connected in parallel with pins 5, 6 and 8. |
| 8 | D | passive | Drain. Connected in parallel with pins 5, 6 and 7 for lower drain-lead resistance and improved heat dissipation. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Bruckewell |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `MSQ30P15`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Bruckewell datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603380743481671680) (None pp, sha256 `50e6110708e3c764`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/msq30p15-datasheet.pdf)