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MSQ100N03D

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Bruckewell MOSFETs, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs msq100n03d: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers msq100n03d: viewers · Ray 28d ago
msq100n03d-etched.fit.json msq100n03d: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
msq100n03d-etched.glb msq100n03d: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
msq100n03d-etched.step msq100n03d: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
msq100n03d.glb Publish 0.1.0 · Ray 28d ago
msq100n03d.kicad_mod Publish 0.1.0 · Ray 28d ago
msq100n03d.kicad_sym Publish 0.1.0 · Ray 28d ago
msq100n03d.lbr Publish 0.1.0 · Ray 28d ago
msq100n03d.step Publish 0.1.0 · Ray 28d ago
package.json Publish 0.1.0 · Ray 28d ago
page.json msq100n03d: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 17h ago
README.md msq100n03d: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 19d ago

MSQ100N03D

Bruckewell · MOSFETs · SOP-8

MSQ100N03D from Bruckewell, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of MOSFET 1. Return terminal for the first N-channel MOSFET channel; VGS rated ±20V, IS continuous up to 5A (limited by total power dissipation).
2 G1 input Gate of MOSFET 1. Control input for the first N-channel MOSFET; VGS(th)=1.0-2.5V (typ 1.7V), VGS absolute max ±20V.
3 S2 passive Source of MOSFET 2. Return terminal for the second N-channel MOSFET channel; VGS rated ±20V, IS continuous up to 5A (limited by total power dissipation).
4 G2 input Gate of MOSFET 2. Control input for the second N-channel MOSFET; VGS(th)=1.0-2.5V (typ 1.7V), VGS absolute max ±20V.
5 D2 passive Drain of MOSFET 2 (paired with pin 6 for reduced RDS(ON) and improved thermal). VDS rated 100V, ID continuous 2.3A @ TA=25°C.
6 D2 passive Drain of MOSFET 2 (paired with pin 5 for reduced RDS(ON) and improved thermal). VDS rated 100V, ID continuous 2.3A @ TA=25°C.
7 D1 passive Drain of MOSFET 1 (paired with pin 8 for reduced RDS(ON) and improved thermal). VDS rated 100V, ID continuous 2.3A @ TA=25°C.
8 D1 passive Drain of MOSFET 1 (paired with pin 7 for reduced RDS(ON) and improved thermal). VDS rated 100V, ID continuous 2.3A @ TA=25°C.

Key specifications

Parameter Value
Manufacturer Bruckewell
Package SOP-8
Category Transistors/Thyristors
Pins 8

CAD (KiCad official)

  • Symbol: MSQ100N03D
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: msq100n03d-etched.step / msq100n03d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msq100n03d.step / msq100n03d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Bruckewell datasheet (None pp, sha256 327fe26741d41371, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF