component

MSPM0L1306TRGER

Public Made by Adom

by adom

Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersmspm0l1306trgerfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

MSPM0L1306TRGER

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · VQFN-24(4x4)

MSPM0L1306TRGER from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA1 tri_state General-purpose digital I/O with wake up from SHUTDOWN; 5-V tolerant open-drain pin; default I2C BSL clock (I2C0_SCL)
2 NRST input Active-low reset input; must be pulled to VDD with optional 47 kΩ pullup resistor and 10 nF capacitor to ground
3 VDD power_in Power supply input from 1.62 V to 3.6 V; requires 10 µF and 0.1 µF decoupling capacitors placed close to pin
4 VSS power_in Ground supply return path for all currents
5 PA2 bidirectional General-purpose digital I/O with ROSC function for external resistor frequency correction of SYSOSC
6 PA3 bidirectional General-purpose digital I/O supporting timer capture/compare, SPI chip select, UART flow control, and comparator output functions
7 PA4 bidirectional General-purpose digital I/O supporting timer capture/compare, SPI peripheral in, and UART request-to-send functions
8 PA9 bidirectional General-purpose digital I/O supporting UART0 receive, SPI controller out, UART1 clear-to-send, timer, and clock output functions
9 PA10 bidirectional General-purpose digital I/O with high-speed capability supporting UART1 transmit, SPI peripheral in, I2C data, and timer functions
10 PA11 bidirectional General-purpose digital I/O supporting UART1 receive, SPI clock, I2C clock, timer, and comparator output functions
11 PA15 bidirectional General-purpose digital I/O / ADC input A9 supporting UART1 request-to-send, I2C1 clock, SPI chip select 2, and timer functions
12 PA16 bidirectional General-purpose digital I/O / ADC input A8 / OPA1 output supporting comparator output, I2C1 data, SPI peripheral in, and timer functions
13 PA17 bidirectional General-purpose digital I/O with wake-up capability / OPA1 inverting input 1 supporting UART0 transmit, I2C1 clock, and SPI signals
14 PA18 bidirectional General-purpose digital I/O with wake-up capability / ADC input A7 / OPA1 non-inverting input / GPAMP inverting input / BSL invoke; supports UART0 receive, SPI, and I2C1 signals
15 PA19 bidirectional General-purpose digital I/O with high-speed capability / serial wire debug data (SWDIO); supports I2C1 data and SPI peripheral in functions
16 PA20 bidirectional General-purpose digital I/O / ADC input A6 / Comparator non-inverting input 1 / serial wire debug clock (SWCLK); supports I2C1 clock and timer functions
17 PA21 bidirectional General-purpose digital I/O / ADC input A5 / external voltage reference return (VREF-); supports timer and UART0 flow control functions
18 PA22 bidirectional General-purpose digital I/O / ADC input A4 / GPAMP output / OPA0 output / default BSL UART receive (BSLRX); supports UART0, timer, and clock output
19 PA23 bidirectional General-purpose digital I/O / external voltage reference input (VREF+) / Comparator inverting input 1 / default BSL UART transmit (BSLTX); supports UART and timer
20 PA24 bidirectional General-purpose digital I/O / ADC input A3 / OPA0 inverting inputs (both IN1- and IN0-); supports SPI chip select 2 and timer functions
21 PA25 bidirectional General-purpose digital I/O / ADC input A2 / OPA0 non-inverting input (OPA0_IN0+); supports timer, UART0 transmit, and SPI controller out functions
22 PA26 bidirectional General-purpose digital I/O / ADC input A1 / GPAMP non-inverting input / Comparator non-inverting input 0; supports timer, UART0 receive, and SPI peripheral in
23 VCORE power_out Regulated core voltage output (1.35 V nominal); connect only 470 nF capacitor to VSS; do not supply external voltage or apply any external load
24 PA0 tri_state General-purpose digital I/O with wake up from SHUTDOWN; 5-V tolerant open-drain pin / default I2C BSL data (I2C0_SDA); supports UART1, timer, and SPI functions
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24(4x4)
Category Embedded Processors & Controllers
Pins 25

CAD (KiCad official)

  • Symbol: MSPM0L1306TRGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: VQFN-24(4x4) (KiCad packages3D, STEP)
  • 3D model files: mspm0l1306trger-etched.step / mspm0l1306trger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mspm0l1306trger.step / mspm0l1306trger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (85 pp, sha256 494c4a6a4ea26582, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF