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Symbol & Footprint

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Datasheet

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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

MSPM0L1105TRHBR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · VQFN-32(5x5)

MSPM0L1105TRHBR from Texas Instruments, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	PA0	bidirectional	GPIO, 5-V tolerant open-drain, supports UART1_TX, I2C0_SDA, TIMG1_C0, SPI0_CS1; wake from SHUTDOWN
2	PA1	bidirectional	GPIO, 5-V tolerant open-drain, supports UART1_RX, I2C0_SCL, TIMG1_C1; wake from SHUTDOWN
3	NRST	input	Reset input, active-low, must be pulled to VDD for device operation
4	VDD	power_in	Supply voltage input, 1.62V to 3.6V; requires 10µF bulk and 0.1µF bypass capacitors
5	VSS	power_in	Ground reference, system ground connection point
6	PA2	bidirectional	GPIO or ROSC external resistor (100kΩ, 0.1% tolerance) for oscillator trimming, supports TIMG1_C1, SPI0_CS0
7	PA3	bidirectional	GPIO supporting TIMG2_C0, SPI0_CS1, UART1_CTS functions
8	PA4	bidirectional	GPIO supporting TIMG2_C1, SPI0_POCI, UART1_RTS functions
9	PA5	bidirectional	High-speed GPIO supporting TIMG0_C0, SPI0_PICO, FCC_IN functions
10	PA6	bidirectional	GPIO supporting TIMG0_C1, SPI0_SCK functions
11	PA7	bidirectional	GPIO supporting CLK_OUT, TIMG1_C0 functions
12	PA8	bidirectional	GPIO supporting UART0_TX, SPI0_CS0, UART1_RTS, TIMG2_C0 functions
13	PA9	bidirectional	GPIO supporting UART0_RX, SPI0_PICO, UART1_CTS, TIMG2_C1 functions
14	PA10	bidirectional	High-speed GPIO supporting UART1_TX, SPI0_POCI, I2C0_SDA, TIMG4_C0 functions
15	PA11	bidirectional	GPIO supporting UART1_RX, SPI0_SCK, I2C0_SCL, TIMG4_C1 functions
16	PA12	bidirectional	GPIO supporting UART0_CTS, TIMG0_C0, FCC_IN functions
17	PA13	bidirectional	GPIO supporting UART0_RTS, TIMG0_C1, UART1_RX functions
18	PA14	bidirectional	GPIO supporting UART1_CTS, CLK_OUT, UART1_TX, TIMG1_C0 functions
19	PA15	bidirectional	GPIO or ADC0 analog input channel 9, supports UART1_RTS, SPI0_CS2, TIMG4_C1 functions
20	PA16	bidirectional	GPIO or ADC0 analog input channel 8, supports SPI0_POCI, TIMG0_C0, FCC_IN functions
21	PA17	bidirectional	GPIO supporting UART0_TX, SPI0_SCK, TIMG4_C0, SPI0_CS1 functions; wake from SHUTDOWN
22	PA18	bidirectional	GPIO or ADC0 analog input 7 or GPAMP inverting input, supports UART0_RX, SPI0_PICO, TIMG4_C1; BSL invoke pin; wake from SHUTDOWN
23	PA19	bidirectional	High-speed GPIO or SWDIO serial wire debug data interface (bidirectional), supports SPI0_POCI function
24	PA20	bidirectional	GPIO or ADC0 analog input 6 or SWCLK serial wire debug clock input, supports TIMG4_C0 function
25	PA21	bidirectional	GPIO or ADC0 analog input 5 or external VREF- reference ground, supports TIMG2_C0, UART0_CTS, UART0_TX functions
26	PA22	bidirectional	GPIO or ADC0 analog input 4 or GPAMP output, default BSL UART receive, supports UART0_RX, TIMG2_C1, UART0_RTS, CLK_OUT, UART1_RX functions
27	PA23	bidirectional	GPIO or external VREF+ reference power supply, default BSL UART transmit, supports UART0_TX, SPI0_CS3, TIMG0_C0, UART0_CTS, UART1_TX functions
28	PA24	bidirectional	GPIO or ADC0 analog input channel 3, supports SPI0_CS2, TIMG0_C1, UART0_RTS functions
29	PA25	bidirectional	GPIO or ADC0 analog input channel 2, supports TIMG4_C1, UART0_TX, SPI0_PICO functions
30	PA26	bidirectional	GPIO or ADC0 analog input channel 1 or GPAMP non-inverting input, supports TIMG1_C0, UART0_RX, SPI0_POCI functions
31	PA27	bidirectional	GPIO or ADC0 analog input channel 0, supports TIMG1_C1, SPI0_CS3 functions
32	VCORE	power_out	Regulated core power supply output, 1.35V nominal; requires 470nF decoupling capacitor to ground
33	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-32(5x5)
Category	Embedded Processors & Controllers
Pins	33

CAD (KiCad official)

Symbol: MSPM0L1105TRHBR
Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
3D model files: mspm0l1105trhbr-etched.step / mspm0l1105trhbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mspm0l1105trhbr.step / mspm0l1105trhbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (74 pp, sha256 99a46f09107d8a08, retrieved 2026-10-03, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF