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MSPM0G3107SRHBR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+70@@ -0,0 +1,70 @@+# MSPM0G3107SRHBR++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · VQFN-32(5x5)++MSPM0G3107SRHBR from Texas Instruments, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PA0 | bidirectional | 5 V tolerant open-drain general-purpose I/O (UART0_TX, I2C0_SDA, FCC_IN, among others) that can wake the device from SHUTDOWN; an external pull-up is required for output high. |+| 2 | PA1 | bidirectional | 5 V tolerant open-drain general-purpose I/O (UART0_RX, I2C0_SCL, among others) that can wake the device from SHUTDOWN; an external pull-up is required for output high. |+| 3 | NRST | input | Active-low reset input that must be pulled up to VDD for the device to leave reset and start; TI recommends a 47 kΩ pull-up with a 10 nF capacitor. |+| 4 | VDD | power_in | Device supply voltage, recommended range 1.62 V to 3.6 V (absolute maximum -0.3 V to 4.1 V), with a 10 µF and 0.1 µF low-ESR decoupling capacitor pair placed close to the pin. |+| 5 | VSS | power_in | Ground supply pin for the device, to which the VDD decoupling capacitors and the VCORE capacitor return. |+| 6 | PA2 | bidirectional | General-purpose digital I/O that is also the ROSC pin; when the SYSOSC frequency correction loop is used, a 100 kΩ ±0.1% (±25 ppm) resistor must be connected from this pin to VSS. |+| 7 | PA3 | bidirectional | Standard-drive general-purpose I/O that also serves as the LFXT low-frequency crystal input (LFXIN, 32.768 kHz). |+| 8 | PA4 | bidirectional | Standard-drive general-purpose I/O that also serves as the LFXT crystal output (LFXOUT) or the digital LFCLK_IN input (29.491 kHz to 36.045 kHz). |+| 9 | PA5 | bidirectional | Standard-drive general-purpose I/O that also serves as the HFXT high-frequency crystal input (HFXIN, 4 MHz to 48 MHz depending on HFXTRSEL) and FCC_IN. |+| 10 | PA6 | bidirectional | Standard-drive general-purpose I/O that also serves as the HFXT crystal output (HFXOUT) or the digital HFCLK_IN input (4 MHz to 48 MHz). |+| 11 | PA7 | bidirectional | Standard-drive general-purpose digital I/O that can also be configured as a clock output (CLK_OUT) and timer channels. |+| 12 | PA8 | bidirectional | Standard-drive general-purpose digital I/O with UART1, SPI0, UART0 and TIMA alternate functions. |+| 13 | PA9 | bidirectional | High-speed general-purpose digital I/O (HSIO) with UART1, SPI0, RTC_OUT and CLK_OUT alternate functions; output frequency up to 40 MHz at DRV=1 with VDD ≥ 2.7 V and 20 pF load. |+| 14 | PA10 | bidirectional | High-drive general-purpose I/O (HDIO) that can wake the device from SHUTDOWN, with an absolute maximum sink or source current of 20 mA. |+| 15 | PA11 | bidirectional | High-drive general-purpose I/O (HDIO) that can wake the device from SHUTDOWN, with an absolute maximum sink or source current of 20 mA. |+| 16 | PA12 | bidirectional | High-speed general-purpose digital I/O with UART3, SPI0, CAN_TX, TIMG0 and FCC_IN alternate functions. |+| 17 | PA13 | bidirectional | High-speed general-purpose digital I/O with UART3, SPI0, CAN_RX, TIMG0 and TIMA0 alternate functions. |+| 18 | PA14 | bidirectional | High-speed general-purpose digital I/O that also serves as ADC0 analog input channel 12 (A0_12), with UART0, SPI0, UART3 and CLK_OUT alternate functions. |+| 19 | PA15 | bidirectional | Standard-drive general-purpose digital I/O that also serves as ADC1 analog input channel 0 (A1_0), with UART0, SPI1, I2C1 and timer alternate functions. |+| 20 | PA16 | bidirectional | Standard-drive general-purpose digital I/O that also serves as ADC1 analog input channel 1 (A1_1), with SPI1, I2C1, timer and FCC_IN alternate functions. |+| 21 | PA17 | bidirectional | Standard-drive general-purpose digital I/O with shutdown wake-up capability that also serves as ADC1 analog input channel 2 (A1_2), with UART1, SPI1 and I2C1 alternate functions. |+| 22 | PA18 | bidirectional | Standard-drive general-purpose digital I/O with shutdown wake-up capability that also serves as ADC1 analog input channel 3 (A1_3) and the GPAMP inverting input (GPAMP_IN-). |+| 23 | PA19 | bidirectional | High-speed general-purpose I/O that carries the serial wire debug data signal SWDIO (bidirectional, shared). |+| 24 | PA20 | input | Standard-drive general-purpose I/O that carries the serial wire debug clock input SWCLK from the debug probe. |+| 25 | PA21 | bidirectional | Standard-drive general-purpose digital I/O that also serves as ADC1 analog input channel 7 (A1_7) and the VREF- external reference or ground pin. |+| 26 | PA22 | bidirectional | Standard-drive general-purpose digital I/O that also serves as ADC0 analog input channel 7 (A0_7) and the GPAMP output (GPAMP_OUT). |+| 27 | PA23 | bidirectional | Standard-drive general-purpose digital I/O that also serves as the VREF+ voltage reference pin, for external reference input or internal reference output, which requires a decoupling capacitor (0.7 µF to 1.15 µF) to VREF-/GND. |+| 28 | PA24 | bidirectional | Standard-drive general-purpose digital I/O that also serves as ADC0 analog input channel 3 (A0_3), with UART2, SPI0 and timer alternate functions. |+| 29 | PA25 | bidirectional | Standard-drive general-purpose digital I/O that also serves as ADC0 analog input channel 2 (A0_2), with UART3, SPI1 and timer alternate functions. |+| 30 | PA26 | bidirectional | Standard-drive general-purpose digital I/O that also serves as ADC0 analog input channel 1 (A0_1) and the GPAMP non-inverting input (GPAMP_IN+). |+| 31 | PA27 | bidirectional | Standard-drive general-purpose digital I/O that also serves as ADC0 analog input channel 0 (A0_0) and the RTC clock output (RTC_OUT). |+| 32 | VCORE | power_out | Regulated core supply output; a 0.47 µF capacitor must be connected close to the device between VCORE and VSS, and no external voltage or load may be applied to this pin. |+| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-32(5x5) |+| Category | Embedded Processors & Controllers |+| Pins | 33 |++## CAD (KiCad official)++- Symbol: `MSPM0G3107SRHBR`+- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`+- 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)+- 3D model files: `mspm0g3107srhbr-etched.step` / `mspm0g3107srhbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `mspm0g3107srhbr.step` / `mspm0g3107srhbr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8555053957763993600) (69 pp, sha256 `7c5df909316e74bc`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/mspm0g3107srhbr-datasheet.pdf)
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an external pull-up is required for output high."+ },+ {+ "number": "2",+ "name": "PA1",+ "type": "bidirectional",+ "description": "5 V tolerant open-drain general-purpose I/O (UART0_RX, I2C0_SCL, among others) that can wake the device from SHUTDOWN; an external pull-up is required for output high."+ },+ {+ "number": "3",+ "name": "NRST",+ "type": "input",+ "description": "Active-low reset input that must be pulled up to VDD for the device to leave reset and start; TI recommends a 47 kΩ pull-up with a 10 nF capacitor."+ },+ {+ "number": "4",+ "name": "VDD",+ "type": "power_in",+ "description": "Device supply voltage, recommended range 1.62 V to 3.6 V (absolute maximum -0.3 V to 4.1 V), with a 10 µF and 0.1 µF low-ESR decoupling capacitor pair placed close to the pin."+ },+ {+ "number": "5",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground supply pin for the device, to which the VDD decoupling capacitors and the VCORE capacitor return."+ },+ {+ "number": "6",+ "name": "PA2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O that is also the ROSC pin; when the SYSOSC frequency correction loop is used, a 100 kΩ ±0.1% (±25 ppm) resistor must be connected from this pin to VSS."+ },+ {+ "number": "7",+ "name": "PA3",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose I/O that also serves as the LFXT low-frequency crystal input (LFXIN, 32.768 kHz)."+ },+ {+ "number": "8",+ "name": "PA4",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose I/O that also serves as the LFXT crystal output (LFXOUT) or the digital LFCLK_IN input (29.491 kHz to 36.045 kHz)."+ },+ {+ "number": "9",+ "name": "PA5",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose I/O that also serves as the HFXT high-frequency crystal input (HFXIN, 4 MHz to 48 MHz depending on HFXTRSEL) and FCC_IN."+ },+ {+ "number": "10",+ "name": "PA6",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose I/O that also serves as the HFXT crystal output (HFXOUT) or the digital HFCLK_IN input (4 MHz to 48 MHz)."+ },+ {+ "number": "11",+ "name": "PA7",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose digital I/O that can also be configured as a clock output (CLK_OUT) and timer channels."+ },+ {+ "number": "12",+ "name": "PA8",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose digital I/O with UART1, SPI0, UART0 and TIMA alternate functions."+ },+ {+ "number": "13",+ "name": "PA9",+ "type": "bidirectional",+ "description": "High-speed general-purpose digital I/O (HSIO) with UART1, SPI0, RTC_OUT and CLK_OUT alternate functions; output frequency up to 40 MHz at DRV=1 with VDD ≥ 2.7 V and 20 pF load."+ },+ {+ "number": "14",+ "name": "PA10",+ "type": "bidirectional",+ "description": "High-drive general-purpose I/O (HDIO) that can wake the device from SHUTDOWN, with an absolute maximum sink or source current of 20 mA."+ },+ {+ "number": "15",+ "name": "PA11",+ "type": "bidirectional",+ "description": "High-drive general-purpose I/O (HDIO) that can wake the device from SHUTDOWN, with an absolute maximum sink or source current of 20 mA."+ },+ {+ "number": "16",+ "name": "PA12",+ "type": "bidirectional",+ "description": "High-speed general-purpose digital I/O with UART3, SPI0, CAN_TX, TIMG0 and FCC_IN alternate functions."+ },+ {+ "number": "17",+ "name": "PA13",+ "type": "bidirectional",+ "description": "High-speed general-purpose digital I/O with UART3, SPI0, CAN_RX, TIMG0 and TIMA0 alternate functions."+ },+ {+ "number": "18",+ "name": "PA14",+ "type": "bidirectional",+ "description": "High-speed general-purpose digital I/O that also serves as ADC0 analog input channel 12 (A0_12), with UART0, SPI0, UART3 and CLK_OUT alternate functions."+ },+ {+ "number": "19",+ "name": "PA15",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose digital I/O that also serves as ADC1 analog input channel 0 (A1_0), with UART0, SPI1, I2C1 and timer alternate functions."+ },+ {+ "number": "20",+ "name": "PA16",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose digital I/O that also serves as ADC1 analog input channel 1 (A1_1), with SPI1, I2C1, timer and FCC_IN alternate functions."+ },+ {+ "number": "21",+ "name": "PA17",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose digital I/O with shutdown wake-up capability that also serves as ADC1 analog input channel 2 (A1_2), with UART1, SPI1 and I2C1 alternate functions."+ },+ {+ "number": "22",+ "name": "PA18",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose digital I/O with shutdown wake-up capability that also serves as ADC1 analog input channel 3 (A1_3) and the GPAMP inverting input (GPAMP_IN-)."+ },+ {+ "number": "23",+ "name": "PA19",+ "type": "bidirectional",+ "description": "High-speed general-purpose I/O that carries the serial wire debug data signal SWDIO (bidirectional, shared)."+ },+ {+ "number": "24",+ "name": "PA20",+ "type": "input",+ "description": "Standard-drive general-purpose I/O that carries the serial wire debug clock input SWCLK from the debug probe."+ },+ {+ "number": "25",+ "name": "PA21",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose digital I/O that also serves as ADC1 analog input channel 7 (A1_7) and the VREF- external reference or ground pin."+ },+ {+ "number": "26",+ "name": "PA22",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose digital I/O that also serves as ADC0 analog input channel 7 (A0_7) and the GPAMP output (GPAMP_OUT)."+ },+ {+ "number": "27",+ "name": "PA23",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose digital I/O that also serves as the VREF+ voltage reference pin, for external reference input or internal reference output, which requires a decoupling capacitor (0.7 µF to 1.15 µF) to VREF-/GND."+ },+ {+ "number": "28",+ "name": "PA24",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose digital I/O that also serves as ADC0 analog input channel 3 (A0_3), with UART2, SPI0 and timer alternate functions."+ },+ {+ "number": "29",+ "name": "PA25",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose digital I/O that also serves as ADC0 analog input channel 2 (A0_2), with UART3, SPI1 and timer alternate functions."+ },+ {+ "number": "30",+ "name": "PA26",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose digital I/O that also serves as ADC0 analog input channel 1 (A0_1) and the GPAMP non-inverting input (GPAMP_IN+)."+ },+ {+ "number": "31",+ "name": "PA27",+ "type": "bidirectional",+ "description": "Standard-drive general-purpose digital I/O that also serves as ADC0 analog input channel 0 (A0_0) and the RTC clock output (RTC_OUT)."+ },+ {+ "number": "32",+ "name": "VCORE",+ "type": "power_out",+ "description": "Regulated core supply output; a 0.47 µF capacitor must be connected close to the device between VCORE and VSS, and no external voltage or load may be applied to this pin."+ },+ {+ "number": "33",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The exposed thermal pad of the VQFN-32 package is not a numbered pin and is omitted from pins. The d; Pin numbers were taken from the RHB columns of Table 6-1 (pin attributes) and Table 6-3 (signal desc; Types for multi-function pins are set to bidirectional (GPIO I/O with analog or peripheral alternate",+ "exposed pad 33 added from the footprint"+ ],+ "pages_sent": 51,+ "cost_usd": 0.3245,+ "at": "2026-10-08T18:22:13"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8555053957763993600",+ "pages": 69,+ "sha256": "7c5df909316e74bc",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 33,+ "described": 33,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "mspm0g3107srhbr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 5,+ 5,+ 0.875+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "mspm0g3107srhbr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 5,+ 5,+ 0.875+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "8d190d0f66f5bd5632b16140f2780fa4c6e36ba4b60ef8cb22d0e46807ba5cb8",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}