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MSPM0G1107TPTR

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Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersmspm0g1107tptrfactory-2.0.0extractor-text

Verified MSPM0G1107TPTR

by Ray · last 6 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

6 Nov 2026RayPublished by the parts factory: tier mfr, 48 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: MSPM0G1107TPTR · LQFP-48(7x7) · 48 pins
  • ✓copper: 48 copper pads, none touching another net
  • ✓datasheet: all 48 pin names found in the 121-page datasheet
  • ✓distributor: lcsc C22362624, digikey 296-MSPM0G1107TPTR-ND, mouser 595-MSPM0G1107TPTR
  • ✓family: LQFP-48_7x7mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-y47iundh/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 48 pins = 48 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 48 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ mspm0g1107tptr.kicad_sym✓ mspm0g1107tptr.kicad_mod✓ mspm0g1107tptr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 2h ago
viewers mspm0g1107tptr: viewers · Ray 2h ago
mspm0g1107tptr-etched.glb Publish 0.1.0 · Ray 2h ago
mspm0g1107tptr-etched.step mspm0g1107tptr: factory component page (tier=mfr) · Ray 2h ago
mspm0g1107tptr-hero.glb mspm0g1107tptr: hero GLB from the etched model (keeps the MPN mark) · Ray 2h ago
mspm0g1107tptr-hero.overlay.json Publish 0.1.0 · Ray 2h ago
mspm0g1107tptr.glb Publish 0.1.0 · Ray 2h ago
mspm0g1107tptr.kicad_mod Publish 0.1.0 · Ray 2h ago
mspm0g1107tptr.kicad_sym Publish 0.1.0 · Ray 2h ago
mspm0g1107tptr.lbr Publish 0.1.0 · Ray 2h ago
mspm0g1107tptr.step Publish 0.1.0 · Ray 2h ago
package.json Publish 0.1.0 · Ray 2h ago
page.json Set visibility: public · Ray 2h ago
README.md Publish 0.1.0 · Ray 2h ago
verification.json Verified: Published by the parts factory: tier mfr, 48 pins · Ray 1h ago

MSPM0G1107TPTR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

MSPM0G1107TPTR from Texas Instruments, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA0 / FCC_IN bidirectional 5V-tolerant open-drain I/O with wake from SHUTDOWN; also UART0_TX, I2C0_SDA and default BSL I2C_SDA.
2 PA1 bidirectional 5V-tolerant open-drain I/O with wake from SHUTDOWN; also UART0_RX, I2C0_SCL and default BSL I2C_SCL.
3 PA28 bidirectional High-drive I/O with wake from SHUTDOWN; alternates include UART0_TX and I2C0_SDA.
4 NRST input Active-low reset input; it must be pulled high to VDD for the device to release reset and start.
5 PA31 / CLK_OUT bidirectional High-drive I/O with wake from SHUTDOWN; alternates include UART0_RX, I2C0_SCL and CLK_OUT.
6 VDD power_in Power supply, 1.62V to 3.6V with a 10µF bulk decoupling capacitor between VDD and VSS.
7 VSS power_in Ground supply; the QFN exposed pad is recommended to be connected to VSS.
8 PA2 / ROSC bidirectional Standard general-purpose I/O; used as the ROSC pin for the 100kΩ 0.1% reference resistor to VSS when the SYSOSC FCL is enabled.
9 PA3 / LFXIN bidirectional Standard general-purpose I/O; input of the 32kHz low-frequency crystal oscillator (LFXT).
10 PA4 / LFCLK_IN / LFXOUT bidirectional Standard general-purpose I/O; LFXT crystal output or digital low-frequency clock input.
11 PA5 / HFXIN / FCC_IN bidirectional Standard general-purpose I/O; input of the high-frequency crystal oscillator (HFXT).
12 PA6 / HFCLK_IN / HFXOUT bidirectional Standard general-purpose I/O; HFXT crystal output or digital high-frequency clock input.
13 PA7 / CLK_OUT bidirectional Standard general-purpose digital I/O; configurable clock output CLK_OUT.
14 PB2 bidirectional Standard general-purpose digital I/O.
15 PB3 bidirectional Standard general-purpose digital I/O.
16 PA8 bidirectional Standard general-purpose digital I/O.
17 PA9 / RTC_OUT / CLK_OUT bidirectional High-speed digital I/O; RTC clock output and CLK_OUT are alternate functions.
18 PA10 / CLK_OUT bidirectional High-drive I/O; also UART0_TX and the default BSL UART_TX.
19 PA11 bidirectional High-drive I/O with wake from SHUTDOWN; also UART0_RX and the default BSL UART_RX.
20 PB6 bidirectional Standard general-purpose digital I/O.
21 PB7 bidirectional Standard general-purpose digital I/O.
22 PB8 bidirectional Standard general-purpose digital I/O.
23 PB9 bidirectional Standard general-purpose digital I/O.
24 PB14 bidirectional Standard general-purpose digital I/O.
25 PB15 bidirectional Standard general-purpose digital I/O.
26 PB16 bidirectional Standard general-purpose digital I/O.
27 PA12 / FCC_IN bidirectional High-speed digital I/O; also UART3_CTS and SPI0_SCK.
28 PA13 bidirectional High-speed digital I/O; also UART3_RTS and SPI0_POCI.
29 PA14 / CLK_OUT / A0_12 bidirectional High-speed digital I/O; also ADC0 analog input 12.
30 PA15 / A1_0 bidirectional Standard digital I/O; also ADC1 analog input 0.
31 PA16 / A1_1 / FCC_IN bidirectional Standard digital I/O; also ADC1 analog input 1.
32 PA17 / A1_2 bidirectional Standard I/O with wake from SHUTDOWN; also ADC1 analog input 2.
33 PA18 bidirectional Standard I/O with wake from SHUTDOWN; also ADC1 analog input 3 and GPAMP inverting input; default BSL_invoke.
34 PA19 / SWDIO bidirectional High-speed I/O; serial wire debug data input/output.
35 PA20 / SWCLK input Standard I/O; serial wire debug clock input.
36 PB17 / A1_4 bidirectional Standard digital I/O; also ADC1 analog input 4.
37 PB18 / A1_5 bidirectional Standard digital I/O; also ADC1 analog input 5.
38 PB19 / A1_6 bidirectional Standard digital I/O; also ADC1 analog input 6.
39 PA21 bidirectional Standard digital I/O; also ADC1 analog input 7 and VREF- ground; has an internal test connection and no injection current is allowed on this pin.
40 PA22 / CLK_OUT / A0_7 bidirectional Standard digital I/O; also ADC0 analog input 7 and GPAMP_OUT.
41 PB20 / A0_6 bidirectional Standard digital I/O; also ADC0 analog input 6.
42 PB24 / A0_5 bidirectional Standard digital I/O; also ADC0 analog input 5.
43 PA23 / VREF+ bidirectional Standard digital I/O; also the VREF+ reference supply, external reference input or internal reference output, requiring a decoupling capacitor.
44 PA24 / A0_3 bidirectional Standard digital I/O; also ADC0 analog input 3.
45 PA25 / A0_2 bidirectional Standard digital I/O; also ADC0 analog input 2.
46 PA26 bidirectional Standard digital I/O; also ADC0 analog input 1 and GPAMP noninverting input.
47 PA27 / RTC_OUT / A0_0 bidirectional Standard digital I/O; also ADC0 analog input 0 and RTC clock output.
48 VCORE power_out Regulated core power supply output; it needs a 470nF tank capacitor to VSS and must not be connected to other circuits or loaded externally.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD -0.3 4.1 V At VDD pin 29
Input voltage 5-V tolerant open-drain pins VI -0.3 5.5 V Applied to any 5-V tolerant open-drain pins 29
Input voltage common tolerance pins VI -0.3 4.1 V Applied to any common tolerance pins; printed as VDD + 0.3 (4.1 MAX) 29
Current into VDD pin (source) IVDD 80 mA -40°C ≤ Tj ≤ 130°C 29
Current into VDD pin (source) IVDD 100 mA -40°C ≤ Tj ≤ 90°C 29
Current out of VSS pin (sink) IVSS 80 mA -40°C ≤ Tj ≤ 130°C 29
Current out of VSS pin (sink) IVSS 100 mA -40°C ≤ Tj ≤ 90°C 29
Current of SDIO pin IIO 6 mA Current sunk or sourced by SDIO pin 29
Current of HSIO pin IIO 6 mA Current sunk or sourced by HSIO pin 29
Current of HDIO pin IIO 20 mA Current sunk or sourced by HDIO pin 29
Current of ODIO pin IIO 20 mA Current sunk by ODIO pin 29
Supported diode current ID -2 2 mA Diode current at any device pin 29
Ambient temperature TA -40 125 °C Ambient temperature 29
Junction temperature TJ -40 130 °C Junction temperature 29
Storage temperature Tstg -40 150 °C Storage temperature 29
Supply voltage VDD 1.62 3.6 V Supply voltage 29
Voltage on VCORE pin VCORE 1.35 V Voltage on VCORE pin 29
Capacitor between VDD and VSS CVDD 10 uF Capacitor connected between VDD and VSS 29
Capacitor between VCORE and VSS CVCORE 470 nF Capacitor connected between VCORE and VSS 29
Ambient temperature, S version TA -40 125 °C Ambient temperature, S version 29
Max junction temperature, S version TJ 130 °C Max junction temperature, S version 29
MCLK, CPUCLK frequency fMCLK 80 MHz With 2 flash wait states 30
MCLK, CPUCLK frequency fMCLK 48 MHz With 1 flash wait state 30
MCLK, CPUCLK frequency fMCLK 24 MHz With 0 flash wait states 30
ULPCLK frequency fULPCLK 40 MHz ULPCLK frequency (PD0 bus clock) 30
Junction-to-ambient thermal resistance LQFP-48 (PT) RθJA 69.2 °C/W LQFP-48 (PT) 30
Junction-to-case (top) thermal resistance LQFP-48 (PT) RθJC(top) 27.4 °C/W LQFP-48 (PT) 30
Junction-to-board thermal resistance LQFP-48 (PT) RθJB 32.6 °C/W LQFP-48 (PT) 30
Junction-to-top characterization parameter LQFP-48 (PT) ΨJT 2.6 °C/W LQFP-48 (PT) 30
Junction-to-board characterization parameter LQFP-48 (PT) ΨJB 32.3 °C/W LQFP-48 (PT) 30
Power-on reset voltage level rising VPOR+ 0.95 1.3 1.59 V Rising 33
Power-on reset voltage level falling VPOR- 0.9 1.25 1.54 V Falling 33
Brown-out reset voltage level 0 rising VBOR0+ 1.56 1.59 1.62 V Rising, device operating in RUN, SLEEP, or STOP mode 34
Brown-out reset voltage level 0 falling VBOR0- 1.55 1.58 1.61 V Falling, device operating in RUN, SLEEP, or STOP mode 34
High level input voltage ODIO VIH 2 5.5 V ODIO, VDD≥2.7V 39
Low level input voltage ODIO VIL -0.3 0.8 V ODIO, VDD≥2.7V 39
Low level output voltage SDIO VOL 0.4 V VDD≥2.7V, /IIO/max=6mA, -40°C ≤ Ta ≤ 25°C 41
Low level output voltage SDIO VOL 0.45 V VDD≥2.7V, /IIO/max=6mA, -40°C ≤ Ta ≤ 125°C 41
Low level output voltage ODIO VOL 0.4 V VDD≥2.7V, IOL,max=8mA, -40°C ≤ Ta ≤ 25°C 41
Low level output voltage ODIO VOL 0.45 V VDD≥2.7V, IOL,max=8mA, -40°C ≤ Ta ≤ 125°C 41
VREF output voltage VREF 1.38 1.4 1.42 V BUFCONFIG = 1 45
VREF output voltage VREF 2.46 2.5 2.54 V BUFCONFIG = 0 45
Temperature sensor factory trim temperature TSTRIM 27 30 33 °C ADC and VREF configuration: RES=0 (12-bit mode), VRSEL=0h (VDD = 3.3V), ADC tsample = 12.5uS 45
Temperature sensor temperature coefficient TSc -2.1 -1.8 -1.7 mV/°C -40°C ≤ Tj ≤ 130°C 45
SYSOSC frequency accuracy FCL enabled fSYSOSC -0.8 0.93 % SETUSEFCL=1, -40°C ≤ Ta ≤ 85°C 36
SYSOSC frequency accuracy FCL enabled fSYSOSC -0.8 1.1 % SETUSEFCL=1, -40°C ≤ Ta ≤ 105°C 36
SYSOSC frequency accuracy FCL enabled fSYSOSC -0.8 1.3 % SETUSEFCL=1, -40°C ≤ Ta ≤ 125°C 36
SYSOSC accuracy FCL enabled with ROSC at ROSC pin, factory trimmed fSYSOSC -1.1 1.7 % SETUSEFCL=1, -40°C ≤ Ta ≤ 125°C, ±0.1% ±25ppm ROSC 36
SYSOSC frequency accuracy FCL with internal ROSC, 4MHz fSYSOSC -2.3 1.8 % SETUSEFCL=1, -40°C ≤ Ta ≤ 125°C 37
SYSOSC accuracy FCL disabled, 32MHz fSYSOSC -2.6 1.8 % SETUSEFCL=0, SYSOSCCFG.FREQ=00, -40°C ≤ Ta ≤ 125°C 37
SYSOSC accuracy FCL disabled, 4MHz fSYSOSC -2.8 2.1 % SETUSEFCL=0, SYSOSCCFG.FREQ=01, -40°C ≤ Ta ≤ 125°C 37
LFOSC accuracy fLFOSC -5 5 % -40°C ≤ Ta ≤ 125°C 37
LFOSC accuracy fLFOSC -3 3 % -40°C ≤ Ta ≤ 85°C 37
SYSPLL reference frequency range fSYSPLLREF 4 48 MHz SYSPLL reference frequency range 37
VCO output frequency fVCO 80 400 MHz VCO output frequency 37
HFXT frequency fHFXT 4 8 MHz HFXTRSEL=00 38
HFXT frequency fHFXT 8.01 16 MHz HFXTRSEL=01 38
HFXT frequency fHFXT 16.01 32 MHz HFXTRSEL=10 38
HFXT frequency fHFXT 32.01 48 MHz HFXTRSEL=11 38
SPI clock frequency controller or peripheral mode fSPI 16 MHz Clock max speed >= 32MHz, 1.62 < VDD < 3.6V 48
SPI clock frequency peripheral or controller with high speed IO fSPI 24 MHz Clock max speed >= 48MHz, 1.62 < VDD < 2.7V 48
SPI clock frequency peripheral or controller with high speed IO fSPI 32 MHz Clock max speed >= 64MHz, 2.7 < VDD < 3.6V 48

CAD (KiCad official)

  • Symbol: MSPM0G1107TPTR
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: mspm0g1107tptr-etched.step / mspm0g1107tptr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mspm0g1107tptr.step / mspm0g1107tptr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (121 pp, sha256 ec67551b3d3efdb2, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF