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MSP430G2553IRHB32R
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430G2553IRHB32R
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · QFN-32-EP(5x5)
MSP430G2553IRHB32R from Texas Instruments, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.1 | bidirectional | General-purpose I/O pin; Timer0_A capture CCI0A input; UART receive; SPI slave data input; or ADC10 analog input A1. |
| 2 | P1.2 | bidirectional | General-purpose I/O pin; Timer0_A capture CCI1A input; UART transmit output; SPI master data output; or ADC10 analog input A2. |
| 3 | P1.3 | bidirectional | General-purpose I/O pin; ADC10 conversion clock output; Comparator_A+ output; ADC10 negative reference input VREF-; or ADC10 analog input A3. |
| 4 | P1.4 | bidirectional | General-purpose I/O pin; SMCLK system sub-clock output; USCI_B0 slave transmit enable; USCI_A0 clock input/output; ADC10 positive reference VREF+; or JTAG test clock TCK. |
| 5 | P1.5 | bidirectional | General-purpose I/O pin; Timer0_A compare output Out0; USCI_B0 clock input/output; USCI_A0 slave transmit enable; ADC10 analog input A5; or JTAG test mode select TMS. |
| 6 | P3.1 | bidirectional | General-purpose I/O pin; Timer1_A compare output TA0 (available in 28-pin PW and 32-pin RHB packages only). |
| 7 | P3.0 | bidirectional | General-purpose I/O pin; Timer0_A capture CCI2A input (available in 28-pin PW and 32-pin RHB packages only). |
| 8 | NC | unconnected | No internal connection; can be left floating or connected to VSS. |
| 9 | P2.0 | bidirectional | General-purpose I/O pin; Timer1_A capture CCI0A input or compare output TA0. |
| 10 | P2.1 | bidirectional | General-purpose I/O pin; Timer1_A capture CCI1A input or compare output TA1. |
| 11 | P2.2 | bidirectional | General-purpose I/O pin; Timer1_A capture CCI1B input or compare output TA1. |
| 12 | P3.2 | bidirectional | General-purpose I/O pin; Timer1_A compare output TA1 (available in 28-pin PW and 32-pin RHB packages only). |
| 13 | P3.3 | bidirectional | General-purpose I/O pin; Timer1_A compare output TA2 (available in 28-pin PW and 32-pin RHB packages only). |
| 14 | P3.4 | bidirectional | General-purpose I/O pin; Timer0_A compare output TA0 (available in 28-pin PW and 32-pin RHB packages only). |
| 15 | P2.3 | bidirectional | General-purpose I/O pin; Timer1_A capture CCI0B input or compare output TA0. |
| 16 | P2.4 | bidirectional | General-purpose I/O pin; Timer1_A capture CCI2A input or compare output TA2. |
| 17 | P2.5 | bidirectional | General-purpose I/O pin; Timer1_A capture CCI2B input or compare output TA2. |
| 18 | P3.5 | bidirectional | General-purpose I/O pin; Timer0_A compare output TA1 (available in 28-pin PW and 32-pin RHB packages only). |
| 19 | P3.6 | bidirectional | General-purpose I/O pin; Timer0_A compare output TA2 (available in 28-pin PW and 32-pin RHB packages only). |
| 20 | P3.7 | bidirectional | General-purpose I/O pin; Timer1_A clock input TACLK; or Comparator_A+ output CAOUT (available in 28-pin PW and 32-pin RHB packages only). |
| 21 | P1.6 | bidirectional | General-purpose I/O pin; Timer0_A compare output TA1; USCI_B0 slave output master input or I2C clock SCL; ADC10 analog input A6; or JTAG test data input TDI/TCLK. |
| 22 | P1.7 | bidirectional | General-purpose I/O pin; ADC10 analog input A7; Comparator_A+ output; USCI_B0 slave input master output or I2C data SDA; or JTAG test data output TDO/TDI. |
| 23 | RST/NMI/SBWTDIO | bidirectional | Reset input; Non-maskable interrupt input; or Spy-Bi-Wire test data input/output for device programming and testing. |
| 24 | TEST/SBWTCK | input | Test mode select input for port 1 JTAG pins; or Spy-Bi-Wire test clock input for device programming and testing. |
| 25 | XOUT/P2.7 | passive | Crystal oscillator output terminal; or general-purpose I/O pin P2.7 if oscillator not used. |
| 26 | XIN/P2.6 | passive | Crystal oscillator input terminal; Timer0_A compare output TA1; or general-purpose I/O pin P2.6 if oscillator not used. |
| 27 | AVSS | power_in | Analog ground reference voltage (VSS). |
| 28 | DVSS | power_in | Digital ground reference voltage (VSS). |
| 29 | AVCC | power_in | Analog power supply voltage; 1.8V to 3.6V during program execution. |
| 30 | DVCC | power_in | Digital power supply voltage; 1.8V to 3.6V during program execution, 2.2V to 3.6V during flash programming. |
| 31 | P1.0 | bidirectional | General-purpose I/O pin; Timer0_A clock input TACLK; ACLK auxiliary clock output; or ADC10 analog input A0. |
| 32 | NC | unconnected | No internal connection; can be left floating or connected to VSS; not used in this package. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-32-EP(5x5) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
MSP430G2553IRHB32R - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
msp430g2553irhb32r-etched.step/msp430g2553irhb32r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430g2553irhb32r.step/msp430g2553irhb32r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (88 pp, sha256
6b2ec0d3ff2ce347, retrieved 2026-09-23, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).