component
MSP430G2533IRHB32R
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownMSP430G2533IRHB32R
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · VQFN-32-EP(5x5)
MSP430G2533IRHB32R from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.1/TA0.0/UCA0RXD/UCA0SOMI/A1 | bidirectional | General-purpose I/O, Timer0_A capture input, USCI_A0 RXD, or ADC10 input A1 (MSP430G2x33 only) |
| 2 | P1.2/TA0.1/UCA0TXD/UCA0SIMO/A2 | bidirectional | General-purpose I/O, Timer0_A capture input, USCI_A0 TXD, or ADC10 input A2 (MSP430G2x33 only) |
| 3 | P1.3/ADC10CLK/VREF-/VEREF-/A3 | bidirectional | General-purpose I/O, ADC10 conversion clock output, ADC10 negative reference voltage, or ADC10 input A3 (MSP430G2x33 only) |
| 4 | P1.4/SMCLK/UCB0STE/UCA0CLK/VREF+/VEREF+/A4/TCK | bidirectional | General-purpose I/O, SMCLK output, USCI_B0 slave transmit enable, USCI_A0 clock, ADC10 positive reference voltage, ADC10 input A4, or JTAG TCK (MSP430G2x33 only) |
| 5 | P1.5/TA0.0/UCB0CLK/UCA0STE/A5/TMS | bidirectional | General-purpose I/O, Timer0_A compare output, USCI_B0 clock input/output, USCI_A0 slave transmit enable, ADC10 input A5, or JTAG TMS (MSP430G2x33 only) |
| 6 | P3.1/TA1.0 | bidirectional | General-purpose I/O or Timer1_A compare output TA0 (28-pin and 32-pin devices only) |
| 7 | P3.0/TA0.2 | bidirectional | General-purpose I/O or Timer0_A capture/compare input CCI2A (28-pin and 32-pin devices only) |
| 8 | NC | unconnected | Not connected |
| 9 | P2.0/TA1.0 | bidirectional | General-purpose I/O or Timer1_A capture/compare input CCI0A and output TA0 |
| 10 | P2.1/TA1.1 | bidirectional | General-purpose I/O or Timer1_A capture/compare input CCI1A and output TA1 |
| 11 | P2.2/TA1.1 | bidirectional | General-purpose I/O or Timer1_A capture/compare input CCI1B and output TA1 |
| 12 | P3.2/TA1.1 | bidirectional | General-purpose I/O or Timer1_A compare output TA1 (28-pin and 32-pin devices only) |
| 13 | P3.3/TA1.2 | bidirectional | General-purpose I/O or Timer1_A compare output TA2 (28-pin and 32-pin devices only) |
| 14 | P3.4/TA0.0 | bidirectional | General-purpose I/O or Timer0_A compare output TA0 (28-pin and 32-pin devices only) |
| 15 | P2.3/TA1.0 | bidirectional | General-purpose I/O or Timer1_A capture/compare input CCI0B and output TA0 |
| 16 | P2.4/TA1.2 | bidirectional | General-purpose I/O or Timer1_A capture/compare input CCI2A and output TA2 |
| 17 | P2.5/TA1.2 | bidirectional | General-purpose I/O or Timer1_A capture/compare input CCI2B and output TA2 |
| 18 | P3.5/TA0.1 | bidirectional | General-purpose I/O or Timer0_A compare output TA1 (28-pin and 32-pin devices only) |
| 19 | P3.6/TA0.2 | bidirectional | General-purpose I/O or Timer0_A compare output TA2 (28-pin and 32-pin devices only) |
| 20 | P3.7/TA1CLK | bidirectional | General-purpose I/O or Timer1_A clock input TACLK (28-pin and 32-pin devices only) |
| 21 | P1.6/TA0.1/UCB0SOMI/UCB0SCL/A6/TDI/TCLK | bidirectional | General-purpose I/O, Timer0_A compare output, USCI_B0 SOMI/SCL, ADC10 input A6, or JTAG TDI (MSP430G2x33 only) |
| 22 | P1.7/UCB0SIMO/UCB0SDA/A7/TDO/TDI | bidirectional | General-purpose I/O, USCI_B0 SIMO/SDA, ADC10 input A7, or JTAG TDO/TDI output (MSP430G2x33 only) |
| 23 | RST/NMI/SBWTDIO | input | Reset, nonmaskable interrupt input, or Spy-Bi-Wire test data input/output during programming and test |
| 24 | TEST/SBWTCK | input | Test mode select for JTAG pins on Port 1 with device protection fuse, or Spy-Bi-Wire test clock input during programming and test |
| 25 | XOUT/P2.7 | output | Crystal oscillator output terminal or general-purpose I/O pin P2.7 (note: excess current flows if used as input until P2SEL.7 is cleared) |
| 26 | XIN/P2.6/TA0.1 | input | Crystal oscillator input terminal, general-purpose I/O pin P2.6, or Timer0_A compare output TA1 |
| 27 | DVSS | power_in | Digital ground reference voltage VSS |
| 28 | DVSS | power_in | Digital ground reference voltage VSS |
| 29 | AVCC | power_out | Analog supply voltage (MSP430G2x33 devices only) |
| 30 | DVCC | power_out | Digital supply voltage 1.8 V to 3.6 V |
| 31 | P1.0/TA0CLK/ACLK/A0 | bidirectional | General-purpose I/O, Timer0_A clock input TACLK, ACLK signal output, or ADC10 input A0 (MSP430G2x33 only) |
| 32 | NC | unconnected | Not connected |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(5x5) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
MSP430G2533IRHB32R - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
msp430g2533irhb32r-etched.step/msp430g2533irhb32r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430g2533irhb32r.step/msp430g2533irhb32r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (80 pp, sha256
3610d0fa84aafb0b, retrieved 2026-09-30, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).