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MSP430G2513IRHB32R
Public Made by Adomby adom
Texas Instruments Microcontroller Units (MCUs/MPUs/SOCs), VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430G2513IRHB32R
Texas Instruments · Microcontroller Units (MCUs/MPUs/SOCs) · VQFN-32-EP(5x5)
MSP430G2513IRHB32R from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.1 | bidirectional | General-purpose digital I/O with Timer0_A TA0.0 capture/compare, USCI_A0 UART receive or SPI slave-out, and BSL data-transmit functions; the A1/CA1 analog functions are not available on G2x13 devices. |
| 2 | P1.2 | bidirectional | General-purpose digital I/O with Timer0_A TA0.1 capture/compare, USCI_A0 UART transmit or SPI slave-in/master-out; the A2/CA2 analog functions are not available on G2x13 devices. |
| 3 | P1.3 | bidirectional | General-purpose digital I/O that can also serve as CAOUT, and ADC10 clock/reference functions exist only on MSP430G2x53 devices. |
| 4 | P1.4 | bidirectional | General-purpose digital I/O with SMCLK output, USCI_B0 STE, USCI_A0 CLK, and JTAG TCK input used for device programming and test. |
| 5 | P1.5 | bidirectional | General-purpose digital I/O with Timer0_A TA0.0 output, USCI_B0/USCI_A0 clock or STE functions, JTAG TMS input, and BSL data-receive function. |
| 6 | P3.1 | bidirectional | General-purpose digital I/O with Timer1_A TA1.0 output; port P3 pull-down resistors must be enabled by setting P3REN.x = 1. |
| 7 | P3.0 | bidirectional | General-purpose digital I/O with Timer0_A TA0.2 capture/compare; port P3 pull-down resistors must be enabled by setting P3REN.x = 1. |
| 8 | NC | unconnected | Not connected internally. |
| 9 | P2.0 | bidirectional | General-purpose digital I/O with Timer1_A capture input CCI0A and output Out0, with interrupt capability. |
| 10 | P2.1 | bidirectional | General-purpose digital I/O with Timer1_A capture input CCI1A and output Out1, with interrupt capability. |
| 11 | P2.2 | bidirectional | General-purpose digital I/O with Timer1_A capture input CCI1B and output Out1, with interrupt capability. |
| 12 | P3.2 | bidirectional | General-purpose digital I/O with Timer1_A TA1.1 output; port P3 pull-down resistors must be enabled by setting P3REN.x = 1. |
| 13 | P3.3 | bidirectional | General-purpose digital I/O with Timer1_A TA1.2 output; port P3 pull-down resistors must be enabled by setting P3REN.x = 1. |
| 14 | P3.4 | bidirectional | General-purpose digital I/O with Timer0_A TA0.0 output; port P3 pull-down resistors must be enabled by setting P3REN.x = 1. |
| 15 | P2.3 | bidirectional | General-purpose digital I/O with Timer1_A capture input CCI0B and output Out0, with interrupt capability. |
| 16 | P2.4 | bidirectional | General-purpose digital I/O with Timer1_A capture input CCI2A and output Out2, with interrupt capability. |
| 17 | P2.5 | bidirectional | General-purpose digital I/O with Timer1_A capture input CCI2B and output Out2, with interrupt capability. |
| 18 | P3.5 | bidirectional | General-purpose digital I/O with Timer0_A TA0.1 output; port P3 pull-down resistors must be enabled by setting P3REN.x = 1. |
| 19 | P3.6 | bidirectional | General-purpose digital I/O with Timer0_A TA0.2 output; port P3 pull-down resistors must be enabled by setting P3REN.x = 1. |
| 20 | P3.7 | bidirectional | General-purpose digital I/O with Timer1_A TACLK input, and comparator output CAOUT. |
| 21 | P1.6 | bidirectional | General-purpose digital I/O with Timer0_A TA0.1 output, USCI_B0 SPI slave-out or I2C SCL, and JTAG TDI/TCLK input during programming and test. |
| 22 | P1.7 | bidirectional | General-purpose digital I/O with comparator output CAOUT, USCI_B0 SPI slave-in or I2C SDA, and JTAG TDO/TDI data during programming and test. |
| 23 | RST/NMI/SBWTDIO | input | Device reset input (active-low reset mode) or non-maskable interrupt input, and Spy-Bi-Wire test data input/output during programming and test. |
| 24 | TEST/SBWTCK | input | Selects test mode for the JTAG pins on Port 1; the device protection fuse is connected to TEST, and it carries the Spy-Bi-Wire test clock input during programming and test. |
| 25 | XOUT/P2.7 | bidirectional | Crystal oscillator output terminal or general-purpose digital I/O; if used as an input, excessive current flows until P2SEL.7 is cleared because the oscillator output driver is connected to the pad after reset. |
| 26 | XIN/P2.6/TA0.1 | bidirectional | Crystal oscillator input terminal, or general-purpose digital I/O with Timer0_A TA0.1 output. |
| 27 | AVSS | power_in | Analog ground reference pin, as shown in the RHB32 pinout figure; Table 2 lists pin 27 together with DVSS. |
| 28 | DVSS | power_in | Digital ground reference (VSS = 0 V). |
| 29 | AVCC | power_in | Analog supply voltage pin on the RHB package; the datasheet gives an analog supply range of 2.2 V to 3.6 V (VSS = 0 V) for the ADC10, which is available only on MSP430G2x53 devices. |
| 30 | DVCC | power_in | Digital supply voltage; the datasheet specifies VCC of 1.8 V to 3.6 V during program execution and 2.2 V to 3.6 V during flash programming or erase. |
| 31 | P1.0 | bidirectional | General-purpose digital I/O with Timer0_A TACLK input and ACLK output; the A0/CA0 analog inputs are not available on G2x13 devices. |
| 32 | NC | unconnected | Not connected internally. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(5x5) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
MSP430G2513IRHB32R - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
msp430g2513irhb32r-etched.step/msp430g2513irhb32r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430g2513irhb32r.step/msp430g2513irhb32r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (88 pp, sha256
d071b267aa847e08, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).