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MSP430G2452IPW14R

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Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MSP430G2452IPW14R

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TSSOP-14

MSP430G2452IPW14R from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVCC power_in Supply voltage for digital core logic; operating range 1.8 V to 3.6 V.
2 P1.0/TA0CLK/ACLK/A0/CA0 bidirectional General-purpose digital I/O pin; can function as Timer0_A clock input (TA0CLK), ACLK output, ADC10 channel 0 analog input (A0), or Comparator_A+ input (CA0).
3 P1.1/TA0.0/A1/CA1 bidirectional General-purpose digital I/O pin; can function as Timer0_A capture/compare (TA0.0), ADC10 channel 1 analog input (A1), or Comparator_A+ input (CA1).
4 P1.2/TA0.1/A2/CA2 bidirectional General-purpose digital I/O pin; can function as Timer0_A capture/compare (TA0.1), ADC10 channel 2 analog input (A2), or Comparator_A+ input (CA2).
5 P1.3/ADC10CLK/CAOUT/A3/VREF-/VEREF-/CA3 bidirectional General-purpose digital I/O pin; can function as ADC10 conversion clock output (ADC10CLK), Comparator_A+ output (CAOUT), ADC10 channel 3 analog input (A3), ADC10 negative reference voltage (VREF-/VEREF-), or Comparator_A+ input (CA3).
6 P1.4/SMCLK/TA0.2/A4/VREF+/VEREF+/CA4/TCK bidirectional General-purpose digital I/O pin; can function as SMCLK output, Timer0_A capture/compare (TA0.2), ADC10 channel 4 analog input (A4), ADC10 positive reference voltage (VREF+/VEREF+), Comparator_A+ input (CA4), or JTAG test clock input (TCK).
7 P1.5/TA0.0/SCLK/A5/CA5/TMS bidirectional General-purpose digital I/O pin; can function as Timer0_A compare output (TA0.0), USI serial clock (SCLK) in SPI/I2C mode, ADC10 channel 5 analog input (A5), Comparator_A+ input (CA5), or JTAG test mode select input (TMS).
8 P1.6/TA0.1/SDO/SCL/A6/CA6/TDI/TCLK bidirectional General-purpose digital I/O pin; can function as Timer0_A compare output (TA0.1), USI SPI data output (SDO) or I2C clock (SCL), ADC10 channel 6 analog input (A6), Comparator_A+ input (CA6), or JTAG test data/clock input (TDI/TCLK).
9 P1.7/CAOUT/SDI/SDA/A7/CA7/TDO/TDI bidirectional General-purpose digital I/O pin; can function as Comparator_A+ output (CAOUT), USI SPI data input (SDI) or I2C data (SDA), ADC10 channel 7 analog input (A7), Comparator_A+ input (CA7), or JTAG test data output/input (TDO/TDI).
10 RST/NMI/SBWTDIO input Reset input or nonmaskable interrupt input; also provides Spy-Bi-Wire debug data input/output (SBWTDIO) during device programming and test.
11 TEST/SBWTCK input Test mode select input for JTAG configuration and device protection fuse control; also serves as Spy-Bi-Wire test clock input (SBWTCK) during programming.
12 XOUT/P2.7 output Crystal oscillator output or general-purpose digital I/O pin P2.7; excess current flows if used as input until P2SEL.7 is cleared.
13 XIN/P2.6/TA0.1 input Crystal oscillator input terminal; can alternatively function as general-purpose digital I/O pin P2.6 or Timer0_A compare output (TA0.1).
14 DVSS power_in Ground reference for digital and analog circuits.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Embedded Processors & Controllers
Pins 14

CAD (KiCad official)

  • Symbol: MSP430G2452IPW14R
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: msp430g2452ipw14r-etched.step / msp430g2452ipw14r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430g2452ipw14r.step / msp430g2452ipw14r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (78 pp, sha256 213d8b0d2e936702, retrieved 2026-10-05, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF