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MSP430G2402IPW14R
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430G2402IPW14R
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TSSOP-14
MSP430G2402IPW14R from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Digital supply voltage; the features list gives the device operating range as 1.8 V to 3.6 V. |
| 2 | P1.0/TA0CLK/ACLK/A0 | bidirectional | General-purpose digital I/O with Timer0_A TACLK input and ACLK signal output; the ADC10 input A0 is not available on this G2x02 device. |
| 3 | P1.1/TA0.0/A1 | bidirectional | General-purpose digital I/O with Timer0_A capture CCI0A input and compare Out0 output; the ADC10 input A1 is not available on this G2x02 device. |
| 4 | P1.2/TA0.1/A2 | bidirectional | General-purpose digital I/O with Timer0_A capture CCI1A input and compare Out1 output; the ADC10 input A2 is not available on this G2x02 device. |
| 5 | P1.3 | bidirectional | General-purpose digital I/O; the ADC10 clock output, A3 input and VREF-/VEREF- negative reference functions listed for this pin apply only to MSP430G2x32 devices. |
| 6 | P1.4/TA0.2/SMCLK/A4/VREF+/VEREF+/TCK | bidirectional | General-purpose digital I/O with Timer0_A capture CCI2A input, compare Out2 output and SMCLK output; TCK is the JTAG test clock input for device programming and test, while the ADC10 A4 and VREF+/VEREF+ functions apply only to MSP430G2x32 devices. |
| 7 | P1.5/TA0.0/SCLK/A5/TMS | bidirectional | General-purpose digital I/O with Timer0_A compare Out0 output and USI SCLK (I2C clock input or SPI clock input/output); TMS is the JTAG test mode select input, and ADC10 A5 applies only to MSP430G2x32 devices. |
| 8 | P1.6/TA0.1/SDO/SCL/A6/TDI/TCLK | bidirectional | General-purpose digital I/O with Timer0_A compare Out1 output, USI SDO (SPI) or SCL (I2C) function, and JTAG TDI/TCLK input; ADC10 A6 applies only to MSP430G2x32 devices. |
| 9 | P1.7/SDI/SDA/A7/TDO/TDI | bidirectional | General-purpose digital I/O with USI SDI (SPI) or SDA (I2C) data function and JTAG TDO/TDI test data function; ADC10 A7 applies only to MSP430G2x32 devices. |
| 10 | RST/NMI/SBWTDIO | input | Reset input, nonmaskable interrupt input, or Spy-Bi-Wire test data input/output during programming and test. |
| 11 | TEST/SBWTCK | input | Selects test mode for the JTAG pins on Port 1 and serves as the Spy-Bi-Wire test clock input during programming and test; the device protection fuse is connected to TEST. |
| 12 | XOUT/P2.7 | bidirectional | Output terminal of the crystal oscillator or general-purpose digital I/O; if used as an input, excess current flows until P2SEL.7 is cleared. |
| 13 | XIN/P2.6/TA0.1 | bidirectional | Input terminal of the crystal oscillator, general-purpose digital I/O, or Timer0_A compare Out1 output. |
| 14 | DVSS | power_in | Ground reference for the digital supply. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Embedded Processors & Controllers |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
MSP430G2402IPW14R - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
msp430g2402ipw14r-etched.step/msp430g2402ipw14r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430g2402ipw14r.step/msp430g2402ipw14r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (77 pp, sha256
52faf601d4eb32f7, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).