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MSP430G2352IPW20R
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430G2352IPW20R
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TSSOP-20
MSP430G2352IPW20R from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Supply voltage; connect to 1.8 V to 3.6 V nominal. |
| 2 | P1.0/TA0CLK/ACLK/A0/CA0 | bidirectional | General-purpose digital I/O pin configurable for timer clock input, ACLK output, ADC10 analog input A0, or Comparator_A+ input CA0. |
| 3 | P1.1/TA0.0/A1/CA1 | bidirectional | General-purpose digital I/O pin configurable for Timer0_A capture/compare, ADC10 analog input A1, or Comparator_A+ input CA1. |
| 4 | P1.2/TA0.1/A2/CA2 | bidirectional | General-purpose digital I/O pin configurable for Timer0_A capture/compare, ADC10 analog input A2, or Comparator_A+ input CA2. |
| 5 | P1.3/ADC10CLK/CAOUT/A3/VREF-/VEREF-/CA3 | bidirectional | General-purpose digital I/O pin configurable for ADC10 conversion clock output, Comparator_A+ output, ADC10 analog input A3, negative reference voltage, or Comparator_A+ input CA3. |
| 6 | P1.4/SMCLK/TA0.2/A4/VREF+/VEREF+/CA4/TCK | bidirectional | General-purpose digital I/O pin configurable for SMCLK output, Timer0_A capture/compare, ADC10 analog input A4, positive reference voltage, Comparator_A+ input CA4, or JTAG test clock. |
| 7 | P1.5/TA0.0/SCLK/A5/CA5/TMS | bidirectional | General-purpose digital I/O pin configurable for Timer0_A compare output, USI clock SCLK, ADC10 analog input A5, Comparator_A+ input CA5, or JTAG test mode select. |
| 8 | P2.0 | bidirectional | General-purpose digital I/O pin with optional internal pulldown resistor enabled by setting P2REN.0. |
| 9 | P2.1 | bidirectional | General-purpose digital I/O pin with optional internal pulldown resistor enabled by setting P2REN.1. |
| 10 | P2.2 | bidirectional | General-purpose digital I/O pin with optional internal pulldown resistor enabled by setting P2REN.2. |
| 11 | P2.3 | bidirectional | General-purpose digital I/O pin with optional internal pulldown resistor enabled by setting P2REN.3. |
| 12 | P2.4 | bidirectional | General-purpose digital I/O pin with optional internal pulldown resistor enabled by setting P2REN.4. |
| 13 | P2.5 | bidirectional | General-purpose digital I/O pin with optional internal pulldown resistor enabled by setting P2REN.5. |
| 14 | P1.6/TA0.1/SDO/SCL/A6/CA6/TDI/TCLK | bidirectional | General-purpose digital I/O pin configurable for Timer0_A compare output, USI SPI data output SDO or I2C clock SCL, ADC10 analog input A6, Comparator_A+ input CA6, or JTAG test data/clock input. |
| 15 | P1.7/SDI/SDA/CAOUT/A7/CA7/TDO/TDI | bidirectional | General-purpose digital I/O pin configurable for USI SPI data input SDI or I2C data SDA, Comparator_A+ output, ADC10 analog input A7, Comparator_A+ input CA7, or JTAG interface. |
| 16 | RST/NMI/SBWTDIO | input | Reset input; can function as nonmaskable interrupt input NMI or Spy-Bi-Wire test data input/output during programming. |
| 17 | TEST/SBWTCK | input | Test mode select input; device protection fuse connected to TEST; can function as Spy-Bi-Wire test clock during programming. |
| 18 | XOUT/P2.7 | bidirectional | Crystal oscillator output or general-purpose digital I/O pin P2.7; excess current flows if used as input until P2SEL.7 is cleared. |
| 19 | XIN/P2.6/TA0.1 | bidirectional | Crystal oscillator input or general-purpose digital I/O pin P2.6 configurable for Timer0_A compare output. |
| 20 | DVSS | power_in | Ground reference; connect to system ground. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Embedded Processors & Controllers |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
MSP430G2352IPW20R - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
msp430g2352ipw20r-etched.step/msp430g2352ipw20r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430g2352ipw20r.step/msp430g2352ipw20r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (78 pp, sha256
213d8b0d2e936702, retrieved 2026-10-03, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).