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Contents

README

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MSP430G2333IRHB32R

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · QFN-32-EP(5x5)

MSP430G2333IRHB32R from Texas Instruments, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P1.1/TA0.0/UCA0RXD/UCA0SOMI/A1 bidirectional General-purpose I/O pin; Timer0_A capture CCI0A input and compare Out0 output; USCI_A0 UART receive data input; USCI_B0 SPI slave out/master in; ADC10 analog input A1
2 P1.2/TA0.1/UCA0TXD/UCA0SIMO/A2 bidirectional General-purpose I/O pin; Timer0_A capture CCI1A input and compare Out1 output; USCI_A0 UART transmit data output; USCI_B0 SPI slave in/master out; ADC10 analog input A2
3 P1.3/ADC10CLK/VREF-/VEREF-/A3 bidirectional General-purpose I/O pin; ADC10 conversion clock output; ADC10 negative reference voltage input; ADC10 analog input A3
4 P1.4/SMCLK/UCB0STE/UCA0CLK/VREF+/VEREF+/A4/TCK bidirectional General-purpose I/O pin; SMCLK signal output; USCI_B0 slave transmit enable; USCI_A0 clock input/output; ADC10 positive reference voltage input; ADC10 analog input A4; JTAG test clock input
5 P1.5/TA0.0/UCB0CLK/UCA0STE/A5/TMS bidirectional General-purpose I/O pin; Timer0_A compare Out0 output; USCI_B0 clock input/output; USCI_A0 slave transmit enable; ADC10 analog input A5; JTAG test mode select input
6 P3.1/TA1.0 bidirectional General-purpose I/O pin; Timer1_A compare Out0 output
7 P3.0/TA0.2 bidirectional General-purpose I/O pin; Timer0_A capture CCI2A input and compare Out2 output
8 NC unconnected Not connected
9 P2.0/TA1.0 bidirectional General-purpose I/O pin; Timer1_A capture CCI0A input and compare Out0 output
10 P2.1/TA1.1 bidirectional General-purpose I/O pin; Timer1_A capture CCI1A input and compare Out1 output
11 P2.2/TA1.1 bidirectional General-purpose I/O pin; Timer1_A capture CCI1B input and compare Out1 output
12 P3.2/TA1.1 bidirectional General-purpose I/O pin; Timer1_A compare Out1 output
13 P3.3/TA1.2 bidirectional General-purpose I/O pin; Timer1_A compare Out2 output
14 P3.4/TA0.0 bidirectional General-purpose I/O pin; Timer0_A compare Out0 output
15 P2.3/TA1.0 bidirectional General-purpose I/O pin; Timer1_A capture CCI0B input and compare Out0 output
16 P2.4/TA1.2 bidirectional General-purpose I/O pin; Timer1_A capture CCI2A input and compare Out2 output
17 P2.5/TA1.2 bidirectional General-purpose I/O pin; Timer1_A capture CCI2B input and compare Out2 output
18 P3.5/TA0.1 bidirectional General-purpose I/O pin; Timer0_A compare Out1 output
19 P3.6/TA0.2 bidirectional General-purpose I/O pin; Timer0_A compare Out2 output
20 P3.7/TA1CLK bidirectional General-purpose I/O pin; Timer1_A clock signal TACLK input
21 P1.6/TA0.1/UCB0SOMI/UCB0SCL/A6/TDI/TCLK bidirectional General-purpose I/O pin; Timer0_A compare Out1 output; USCI_B0 SPI slave out/master in and I2C clock; ADC10 analog input A6; JTAG test data input or test clock input
22 P1.7/UCB0SIMO/UCB0SDA/A7/TDO/TDI bidirectional General-purpose I/O pin; USCI_B0 SPI slave in/master out and I2C data; ADC10 analog input A7; JTAG test data output or test data input
23 RST/NMI/SBWTDIO input Reset input; nonmaskable interrupt input; Spy-Bi-Wire test data input/output during programming and test
24 TEST/SBWTCK input Test mode select input for JTAG pins on Port 1; Spy-Bi-Wire test clock input during programming and test
25 XOUT/P2.7 bidirectional General-purpose I/O pin; crystal oscillator output terminal
26 XIN/P2.6/TA0.1 bidirectional General-purpose I/O pin; Timer0_A compare Out1 output; crystal oscillator input terminal
27 AVSS power_in Analog ground reference voltage
28 DVSS power_in Digital ground reference voltage
29 AVCC power_in Analog power supply voltage
30 DVCC power_in Digital power supply voltage
31 P1.0/TA0CLK/ACLK/A0 bidirectional General-purpose I/O pin; Timer0_A clock signal TACLK input; ACLK signal output; ADC10 analog input A0
32 NC unconnected Not connected
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-32-EP(5x5)
Category Embedded Processors & Controllers
Pins 33

CAD (KiCad official)

  • Symbol: MSP430G2333IRHB32R
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: msp430g2333irhb32r-etched.step / msp430g2333irhb32r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430g2333irhb32r.step / msp430g2333irhb32r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (80 pp, sha256 3610d0fa84aafb0b, retrieved 2026-10-02, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF