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MSP430G2302IPW14R

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Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MSP430G2302IPW14R

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TSSOP-14

MSP430G2302IPW14R from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVCC power_in Digital supply voltage; the device is specified for the low supply voltage range of 1.8 V to 3.6 V.
2 P1.0/TA0CLK/ACLK bidirectional General-purpose digital I/O pin, also Timer0_A TACLK clock input and ACLK signal output (the ADC10 A0 input is not available on this device).
3 P1.1/TA0.0 bidirectional General-purpose digital I/O pin, also Timer0_A capture input CCI0A or compare output Out0 (the ADC10 A1 input is not available on this device).
4 P1.2/TA0.1 bidirectional General-purpose digital I/O pin, also Timer0_A capture input CCI1A or compare output Out1 (the ADC10 A2 input is not available on this device).
5 P1.3 bidirectional General-purpose digital I/O pin; its ADC10CLK, A3 and VREF- functions are available only on MSP430G2x32 devices and not on this device.
6 P1.4/TA0.2/SMCLK/TCK bidirectional General-purpose digital I/O pin, also Timer0_A capture input CCI2A or compare output Out2, SMCLK signal output, and JTAG test clock input for device programming and test.
7 P1.5/TA0.0/SCLK/TMS bidirectional General-purpose digital I/O pin, also Timer0_A compare output Out0, USI clock (I2C clock input or SPI clock input/output), and JTAG test mode select input.
8 P1.6/TA0.1/SDO/SCL/TDI/TCLK bidirectional General-purpose digital I/O pin, also Timer0_A compare output Out1, USI data output in SPI mode or I2C clock in I2C mode, and JTAG test data/clock input.
9 P1.7/SDI/SDA/TDO/TDI bidirectional General-purpose digital I/O pin, also USI data input in SPI mode or I2C data in I2C mode, and JTAG test data output or test data input.
10 RST/NMI/SBWTDIO input Reset input, nonmaskable interrupt input, or Spy-Bi-Wire test data input/output during programming and test.
11 TEST/SBWTCK input Selects test mode for the JTAG pins on Port 1 (the device protection fuse is connected to TEST), and is the Spy-Bi-Wire test clock input during programming and test.
12 XOUT/P2.7 bidirectional Output terminal of the crystal oscillator, or general-purpose digital I/O pin P2.7; if used as an input, excess current flows until P2SEL.7 is cleared.
13 XIN/P2.6/TA0.1 bidirectional Input terminal of the crystal oscillator, or general-purpose digital I/O pin P2.6 with Timer0_A compare output Out1.
14 DVSS power_in Ground reference for the digital supply.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Embedded Processors & Controllers
Pins 14

CAD (KiCad official)

  • Symbol: MSP430G2302IPW14R
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: msp430g2302ipw14r-etched.step / msp430g2302ipw14r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430g2302ipw14r.step / msp430g2302ipw14r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (77 pp, sha256 6df2cd5fcd8d8260, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF