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Initial commit: component/msp430g2302ipw14r

Ray ·9b0566cc99 ·1d ago
2 files changed +285
README.mdadded+50
@@ -0,0 +1,50 @@+# MSP430G2302IPW14R++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · TSSOP-14++MSP430G2302IPW14R from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DVCC | power_in | Digital supply voltage; the device is specified for the low supply voltage range of 1.8 V to 3.6 V. |+| 2 | P1.0/TA0CLK/ACLK | bidirectional | General-purpose digital I/O pin, also Timer0_A TACLK clock input and ACLK signal output (the ADC10 A0 input is not available on this device). |+| 3 | P1.1/TA0.0 | bidirectional | General-purpose digital I/O pin, also Timer0_A capture input CCI0A or compare output Out0 (the ADC10 A1 input is not available on this device). |+| 4 | P1.2/TA0.1 | bidirectional | General-purpose digital I/O pin, also Timer0_A capture input CCI1A or compare output Out1 (the ADC10 A2 input is not available on this device). |+| 5 | P1.3 | bidirectional | General-purpose digital I/O pin; its ADC10CLK, A3 and VREF- functions are available only on MSP430G2x32 devices and not on this device. |+| 6 | P1.4/TA0.2/SMCLK/TCK | bidirectional | General-purpose digital I/O pin, also Timer0_A capture input CCI2A or compare output Out2, SMCLK signal output, and JTAG test clock input for device programming and test. |+| 7 | P1.5/TA0.0/SCLK/TMS | bidirectional | General-purpose digital I/O pin, also Timer0_A compare output Out0, USI clock (I2C clock input or SPI clock input/output), and JTAG test mode select input. |+| 8 | P1.6/TA0.1/SDO/SCL/TDI/TCLK | bidirectional | General-purpose digital I/O pin, also Timer0_A compare output Out1, USI data output in SPI mode or I2C clock in I2C mode, and JTAG test data/clock input. |+| 9 | P1.7/SDI/SDA/TDO/TDI | bidirectional | General-purpose digital I/O pin, also USI data input in SPI mode or I2C data in I2C mode, and JTAG test data output or test data input. |+| 10 | RST/NMI/SBWTDIO | input | Reset input, nonmaskable interrupt input, or Spy-Bi-Wire test data input/output during programming and test. |+| 11 | TEST/SBWTCK | input | Selects test mode for the JTAG pins on Port 1 (the device protection fuse is connected to TEST), and is the Spy-Bi-Wire test clock input during programming and test. |+| 12 | XOUT/P2.7 | bidirectional | Output terminal of the crystal oscillator, or general-purpose digital I/O pin P2.7; if used as an input, excess current flows until P2SEL.7 is cleared. |+| 13 | XIN/P2.6/TA0.1 | bidirectional | Input terminal of the crystal oscillator, or general-purpose digital I/O pin P2.6 with Timer0_A compare output Out1. |+| 14 | DVSS | power_in | Ground reference for the digital supply. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-14 |+| Category | Embedded Processors & Controllers |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `MSP430G2302IPW14R`+- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`+- 3D model: TSSOP-14 (KiCad packages3D, STEP)+- 3D model files: `msp430g2302ipw14r-etched.step` / `msp430g2302ipw14r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `msp430g2302ipw14r.step` / `msp430g2302ipw14r.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/msp430g2232) (77 pp, sha256 `6df2cd5fcd8d8260`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/msp430g2302ipw14r-datasheet.pdf)
page.jsonadded+235
@@ -0,0 +1,235 @@+{+  "slug": "msp430g2302ipw14r",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "embedded processors & controllers",+    "msp430g2302ipw14r",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "msp430g2302ipw14r.kicad_sym",+    "msp430g2302ipw14r.kicad_mod",+    "msp430g2302ipw14r.glb",+    "msp430g2302ipw14r.step",+    "msp430g2302ipw14r.lbr",+    "docs/hero.png",+    "docs/msp430g2302ipw14r-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "msp430g2302ipw14r-hero.glb",+    "msp430g2302ipw14r-hero.overlay.json"+  ],+  "component": {+    "mpn": "MSP430G2302IPW14R",+    "manufacturer": "Texas Instruments",+    "package": "TSSOP-14",+    "pin_count": 14,+    "category": "Embedded Processors & Controllers",+    "subcategory": "Microcontrollers (MCU/MPU/SOC)",+    "datasheet": "https://www.ti.com/cn/lit/gpn/msp430g2232",+    "parts": {+      "symbol": "msp430g2302ipw14r.kicad_sym",+      "footprint": "msp430g2302ipw14r.kicad_mod",+      "model_3d": "msp430g2302ipw14r-hero.glb",+      "model_3d_plain": "msp430g2302ipw14r.glb",+      "model_3d_step": "msp430g2302ipw14r-etched.step",+      "model_3d_step_plain": "msp430g2302ipw14r.step",+      "lbr": "msp430g2302ipw14r.lbr"+    },+    "distributor_links": {+      "lcsc": "C2053078",+      "digikey": "296-28638-2-ND",+      "mouser": "595-SP430G2302IPW14R"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T02:33:07Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-28638-2-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-SP430G2302IPW14R",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "DVCC",+        "type": "power_in",+        "description": "Digital supply voltage; the device is specified for the low supply voltage range of 1.8 V to 3.6 V."+      },+      {+        "number": "2",+        "name": "P1.0/TA0CLK/ACLK",+        "type": "bidirectional",+        "description": "General-purpose digital I/O pin, also Timer0_A TACLK clock input and ACLK signal output (the ADC10 A0 input is not available on this device)."+      },+      {+        "number": "3",+        "name": "P1.1/TA0.0",+        "type": "bidirectional",+        "description": "General-purpose digital I/O pin, also Timer0_A capture input CCI0A or compare output Out0 (the ADC10 A1 input is not available on this device)."+      },+      {+        "number": "4",+        "name": "P1.2/TA0.1",+        "type": "bidirectional",+        "description": "General-purpose digital I/O pin, also Timer0_A capture input CCI1A or compare output Out1 (the ADC10 A2 input is not available on this device)."+      },+      {+        "number": "5",+        "name": "P1.3",+        "type": "bidirectional",+        "description": "General-purpose digital I/O pin; its ADC10CLK, A3 and VREF- functions are available only on MSP430G2x32 devices and not on this device."+      },+      {+        "number": "6",+        "name": "P1.4/TA0.2/SMCLK/TCK",+        "type": "bidirectional",+        "description": "General-purpose digital I/O pin, also Timer0_A capture input CCI2A or compare output Out2, SMCLK signal output, and JTAG test clock input for device programming and test."+      },+      {+        "number": "7",+        "name": "P1.5/TA0.0/SCLK/TMS",+        "type": "bidirectional",+        "description": "General-purpose digital I/O pin, also Timer0_A compare output Out0, USI clock (I2C clock input or SPI clock input/output), and JTAG test mode select input."+      },+      {+        "number": "8",+        "name": "P1.6/TA0.1/SDO/SCL/TDI/TCLK",+        "type": "bidirectional",+        "description": "General-purpose digital I/O pin, also Timer0_A compare output Out1, USI data output in SPI mode or I2C clock in I2C mode, and JTAG test data/clock input."+      },+      {+        "number": "9",+        "name": "P1.7/SDI/SDA/TDO/TDI",+        "type": "bidirectional",+        "description": "General-purpose digital I/O pin, also USI data input in SPI mode or I2C data in I2C mode, and JTAG test data output or test data input."+      },+      {+        "number": "10",+        "name": "RST/NMI/SBWTDIO",+        "type": "input",+        "description": "Reset input, nonmaskable interrupt input, or Spy-Bi-Wire test data input/output during programming and test."+      },+      {+        "number": "11",+        "name": "TEST/SBWTCK",+        "type": "input",+        "description": "Selects test mode for the JTAG pins on Port 1 (the device protection fuse is connected to TEST), and is the Spy-Bi-Wire test clock input during programming and test."+      },+      {+        "number": "12",+        "name": "XOUT/P2.7",+        "type": "bidirectional",+        "description": "Output terminal of the crystal oscillator, or general-purpose digital I/O pin P2.7; if used as an input, excess current flows until P2SEL.7 is cleared."+      },+      {+        "number": "13",+        "name": "XIN/P2.6/TA0.1",+        "type": "bidirectional",+        "description": "Input terminal of the crystal oscillator, or general-purpose digital I/O pin P2.6 with Timer0_A compare output Out1."+      },+      {+        "number": "14",+        "name": "DVSS",+        "type": "power_in",+        "description": "Ground reference for the digital supply."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The PW14 pinout drawing text on page 3 is garbled in extraction; pin numbers were taken from the PW1; The MSP430G2302 is in the G2x02 family, which has no ADC10. Table 2 marks ADC10 functions (A0-A7, AD; The 14-pin package has no P2.0-P2.5 pins (shown as '-' in Table 2), and no AVCC/AVSS pins. Those pin"+        ],+        "pages_sent": 29,+        "cost_usd": 0.1625,+        "at": "2026-10-08T02:32:50"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/msp430g2232",+        "pages": 77,+        "sha256": "6df2cd5fcd8d8260",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "msp430g2302ipw14r.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6.4,+          5,+          1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "msp430g2302ipw14r-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6.4,+          5,+          1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "18757ca8511b46b2a365c49ee1d88f4c9a88f8751c157a4fa7ce48b0b6a12281",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file