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MSP430G2232IPW20R
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430G2232IPW20R
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TSSOP-20
MSP430G2232IPW20R from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Supply voltage for digital core and I/O logic, rated 1.8 V to 3.6 V. |
| 2 | P1.0/TA0CLK/ACLK/A0 | bidirectional | General-purpose I/O pin; configurable as Timer0_A clock input, auxiliary clock output, or ADC10 analog input channel A0. |
| 3 | P1.1/TA0.0/A1 | bidirectional | General-purpose I/O pin; configurable as Timer0_A capture/compare or ADC10 analog input channel A1. |
| 4 | P1.2/TA0.1/A2 | bidirectional | General-purpose I/O pin; configurable as Timer0_A capture/compare or ADC10 analog input channel A2. |
| 5 | P1.3/ADC10CLK/A3/VREF-/VEREF- | bidirectional | General-purpose I/O pin; configurable as ADC10 conversion clock output, ADC10 analog input channel A3, or ADC10 negative reference voltage input. |
| 6 | P1.4/TA0.2/SMCLK/A4/VREF+/VEREF+/TCK | bidirectional | General-purpose I/O pin; configurable as Timer0_A capture/compare, sub-main clock output, ADC10 analog input channel A4, ADC10 positive reference voltage, or JTAG test clock input. |
| 7 | P1.5/TA0.0/SCLK/A5/TMS | bidirectional | General-purpose I/O pin; configurable as Timer0_A compare output, USI serial clock for SPI/I2C, ADC10 analog input channel A5, or JTAG test mode select input. |
| 8 | P2.0 | bidirectional | General-purpose I/O pin with individually programmable pull-up/pull-down resistor and capacitive-touch sensing capability. |
| 9 | P2.1 | bidirectional | General-purpose I/O pin with individually programmable pull-up/pull-down resistor and capacitive-touch sensing capability. |
| 10 | P2.2 | bidirectional | General-purpose I/O pin with individually programmable pull-up/pull-down resistor and capacitive-touch sensing capability. |
| 11 | P2.3 | bidirectional | General-purpose I/O pin with individually programmable pull-up/pull-down resistor and capacitive-touch sensing capability. |
| 12 | P2.4 | bidirectional | General-purpose I/O pin with individually programmable pull-up/pull-down resistor and capacitive-touch sensing capability. |
| 13 | P2.5 | bidirectional | General-purpose I/O pin with individually programmable pull-up/pull-down resistor and capacitive-touch sensing capability. |
| 14 | P1.6/TA0.1/SDO/SCL/A6/TDI/TCLK | bidirectional | General-purpose I/O pin; configurable as Timer0_A compare output, USI data output in SPI mode or I2C clock, ADC10 analog input channel A6, or JTAG test data/clock input. |
| 15 | P1.7/SDI/SDA/A7/TDO/TDI | bidirectional | General-purpose I/O pin; configurable as USI data input in SPI mode or I2C data line, ADC10 analog input channel A7, or JTAG test data input/output. |
| 16 | RST/NMI/SBWTDIO | input | Reset input (RST), nonmaskable interrupt input (NMI), or Spy-Bi-Wire test data I/O (SBWTDIO); minimum 2 µs pulse width required for reset acceptance. |
| 17 | TEST/SBWTCK | input | Test mode selector for JTAG pins (TEST) connected to device protection fuse; also serves as Spy-Bi-Wire test clock input (SBWTCK) for programming and test operations. |
| 18 | XOUT/P2.7 | bidirectional | Crystal oscillator output (XOUT) or general-purpose I/O pin (P2.7) with pull-up/pull-down resistor and capacitive-touch sensing; excess current may flow if used as input until P2SEL.7 is cleared. |
| 19 | XIN/P2.6/TA0.1 | bidirectional | Crystal oscillator input (XIN), general-purpose I/O pin (P2.6), or Timer0_A compare output (TA0.1) with pull-up/pull-down resistor and capacitive-touch sensing capability. |
| 20 | DVSS | power_in | Ground reference for digital core and I/O logic, 0 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Embedded Processors & Controllers |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
MSP430G2232IPW20R - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
msp430g2232ipw20r-etched.step/msp430g2232ipw20r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430g2232ipw20r.step/msp430g2232ipw20r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (77 pp, sha256
6df2cd5fcd8d8260, retrieved 2026-09-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).