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MSP430G2221IPW14R
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430G2221IPW14R
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TSSOP-14
MSP430G2221IPW14R from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Digital supply voltage; recommended 1.8 V to 3.6 V during program execution and 2.2 V to 3.6 V during flash programming, with absolute maximum VCC of -0.3 V to 4.1 V. |
| 2 | P1.0/TA0CLK/ACLK | bidirectional | General-purpose digital I/O with edge-selectable interrupt; alternate functions are Timer0_A TACLK input and ACLK output. |
| 3 | P1.1/TA0.0 | bidirectional | General-purpose digital I/O with interrupt capability; alternate function is Timer0_A capture CCI0A input or compare Out0 output. |
| 4 | P1.2/TA0.1 | bidirectional | General-purpose digital I/O with interrupt capability; alternate function is Timer0_A capture CCI1A input or compare Out1 output. |
| 5 | P1.3 | bidirectional | General-purpose digital I/O with interrupt capability on the G2x21 device (the ADC10 functions listed for this pin apply only to MSP430G2x31). |
| 6 | P1.4/SMCLK/TCK | bidirectional | General-purpose digital I/O; alternate functions are SMCLK output and JTAG test clock input (TCK) used for device programming and test. |
| 7 | P1.5/TA0.0/SCLK/TMS | bidirectional | General-purpose digital I/O; alternate functions are Timer0_A compare Out0 output, USI SCLK (I2C clock input or SPI clock input/output), and JTAG test mode select (TMS) input. |
| 8 | P1.6/TA0.1/SDO/SCL/TDI/TCLK | bidirectional | General-purpose digital I/O; alternate functions are Timer0_A CCI1A/Out1, USI SDO (SPI data out) or SCL (I2C clock), and JTAG TDI/TCLK input during programming and test. |
| 9 | P1.7/SDI/SDA/TDO/TDI | bidirectional | General-purpose digital I/O; alternate functions are USI SDI (SPI data in) or SDA (I2C data), and JTAG TDO/TDI test data output or input during programming and test. |
| 10 | RST/NMI/SBWTDIO | input | Active reset input or non-maskable interrupt input (NMI), and bidirectional Spy-Bi-Wire test data I/O during programming and test; the required pulse length on RST/NMI to trigger an internal reset is 2 µs at 2.2 V to 3 V. |
| 11 | TEST/SBWTCK | input | Selects the test mode for the JTAG pins on Port 1 and carries the Spy-Bi-Wire test clock input during programming and test; the device protection fuse is connected to TEST. |
| 12 | XOUT/P2.7 | bidirectional | Crystal oscillator output terminal or general-purpose digital I/O P2.7; if used as an input, excessive current flows until P2SEL.7 is cleared after reset because the oscillator output driver is connected to the pad. |
| 13 | XIN/P2.6/TA0.1 | bidirectional | Crystal oscillator input terminal or general-purpose digital I/O P2.6; the TA0.1 function requires BCSCTL3.LFXT1Sx = 11. |
| 14 | DVSS | power_in | Ground reference for the digital supply (0 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Embedded Processors & Controllers |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
MSP430G2221IPW14R - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
msp430g2221ipw14r-etched.step/msp430g2221ipw14r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430g2221ipw14r.step/msp430g2221ipw14r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (65 pp, sha256
137d51708de614ec, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).