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MSP430G2001IPW14R
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430G2001IPW14R
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TSSOP-14
MSP430G2001IPW14R from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Supply voltage pin; the features list gives the device supply range as 1.8 V to 3.6 V. |
| 2 | P1.0/TA0CLK/ACLK | bidirectional | General-purpose digital I/O pin that also serves as the Timer0_A TACLK clock input (TA0CLK) and the ACLK signal output. |
| 3 | P1.1/TA0.0 | bidirectional | General-purpose digital I/O pin that also serves as the Timer0_A CCI0A capture input or the Out0 compare output (TA0.0). |
| 4 | P1.2/TA0.1 | bidirectional | General-purpose digital I/O pin that also serves as the Timer0_A CCI1A capture input or the Out1 compare output (TA0.1). |
| 5 | P1.3 | bidirectional | General-purpose digital I/O pin with no additional function listed for the MSP430G2x01 device. |
| 6 | P1.4/SMCLK/TCK | bidirectional | General-purpose digital I/O pin that also serves as the SMCLK signal output and the JTAG test clock input (TCK) for device programming and test. |
| 7 | P1.5/TA0.0/TMS | bidirectional | General-purpose digital I/O pin that also serves as the Timer0_A Out0 compare output (TA0.0) and the JTAG test mode select input (TMS). |
| 8 | P1.6/TA0.1/TDI/TCLK | bidirectional | General-purpose digital I/O pin that also serves as the Timer0_A Out1 compare output (TA0.1) and the JTAG test data input or test clock input (TDI/TCLK) during programming and test. |
| 9 | P1.7/TDO/TDI | bidirectional | General-purpose digital I/O pin that also serves as the JTAG test data output (TDO) or test data input (TDI) during programming and test, selected via JTAG instruction. |
| 10 | RST/NMI/SBWTDIO | input | Reset input, or nonmaskable interrupt input (NMI), or Spy-Bi-Wire test data input/output (SBWTDIO) during programming and test. |
| 11 | TEST/SBWTCK | input | Selects test mode for the JTAG pins on Port 1, is the connection point for the device protection fuse, and is the Spy-Bi-Wire test clock input (SBWTCK) during programming and test. |
| 12 | XOUT/P2.7 | bidirectional | Output terminal of the crystal oscillator that can also be used as general-purpose I/O P2.7; if used as an input, excess current flows until P2SEL.7 is cleared, because the oscillator output driver is connected to this pad after reset. |
| 13 | XIN/P2.6/TA0.1 | bidirectional | Input terminal of the crystal oscillator that can also be used as general-purpose I/O P2.6 or as the Timer0_A Out1 compare output (TA0.1). |
| 14 | DVSS | power_in | Ground reference pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Embedded Processors & Controllers |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
MSP430G2001IPW14R - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
msp430g2001ipw14r-etched.step/msp430g2001ipw14r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430g2001ipw14r.step/msp430g2001ipw14r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (56 pp, sha256
3a0c0848f8bd8cc3, retrieved 2026-10-10, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).