component
MSP430FW428IPMR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430FW428IPMR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
MSP430FW428IPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Digital supply voltage, positive terminal. |
| 2 | P6.3/SIFCH3/SIFCAOUT | bidirectional | General-purpose digital I/O; Scan IF channel 3 sensor excitation output and signal input, and Scan IF comparator output. |
| 3 | P6.4/SIFCI0 | bidirectional | General-purpose digital I/O; Scan IF channel 0 signal input to the comparator. |
| 4 | P6.5/SIFCI1 | bidirectional | General-purpose digital I/O; Scan IF channel 1 signal input to the comparator. |
| 5 | P6.6/SIFCI2/SIFDACOUT | bidirectional | General-purpose digital I/O; Scan IF channel 2 signal input to the comparator, and 10-bit DAC output. |
| 6 | P6.7/SIFCI3/SVSIN | bidirectional | General-purpose digital I/O; Scan IF channel 3 signal input to the comparator, and SVS analog input. |
| 7 | SIFCI | input | Scan IF input to the comparator. |
| 8 | XIN | input | Input port for crystal oscillator XT1; standard or watch crystals can be connected. |
| 9 | XOUT | output | Output terminal of crystal oscillator XT1. |
| 10 | SIFVSS | power_in | Scan IF AFE reference supply voltage. |
| 11 | SIFCOM | output | Common termination for Scan IF sensors. |
| 12 | P5.1/S0 | bidirectional | General-purpose digital I/O; LCD segment output 0 (LCD function selected by LCD module control bits, not PxSEL). |
| 13 | P5.0/S1 | bidirectional | General-purpose digital I/O; LCD segment output 1 (LCD function selected by LCD module control bits, not PxSEL). |
| 14 | P4.7/S2 | bidirectional | General-purpose digital I/O; LCD segment output 2 (LCD function selected by LCD module control bits, not PxSEL). |
| 15 | P4.6/S3 | bidirectional | General-purpose digital I/O; LCD segment output 3 (LCD function selected by LCD module control bits, not PxSEL). |
| 16 | P4.5/S4 | bidirectional | General-purpose digital I/O; LCD segment output 4 (LCD function selected by LCD module control bits, not PxSEL). |
| 17 | P4.4/S5 | bidirectional | General-purpose digital I/O; LCD segment output 5 (LCD function selected by LCD module control bits, not PxSEL). |
| 18 | P4.3/S6 | bidirectional | General-purpose digital I/O; LCD segment output 6 (LCD function selected by LCD module control bits, not PxSEL). |
| 19 | P4.2/S7 | bidirectional | General-purpose digital I/O; LCD segment output 7 (LCD function selected by LCD module control bits, not PxSEL). |
| 20 | P4.1/S8 | bidirectional | General-purpose digital I/O; LCD segment output 8 (LCD function selected by LCD module control bits, not PxSEL). |
| 21 | P4.0/S9 | bidirectional | General-purpose digital I/O; LCD segment output 9 (LCD function selected by LCD module control bits, not PxSEL). |
| 22 | P3.7/S10 | bidirectional | General-purpose digital I/O; LCD segment output 10 (LCD function selected by LCD module control bits, not PxSEL). |
| 23 | P3.6/S11 | bidirectional | General-purpose digital I/O; LCD segment output 11 (LCD function selected by LCD module control bits, not PxSEL). |
| 24 | P3.5/S12 | bidirectional | General-purpose digital I/O; LCD segment output 12 (LCD function selected by LCD module control bits, not PxSEL). |
| 25 | P3.4/S13 | bidirectional | General-purpose digital I/O; LCD segment output 13 (LCD function selected by LCD module control bits, not PxSEL). |
| 26 | P3.3/S14 | bidirectional | General-purpose digital I/O; LCD segment output 14 (LCD function selected by LCD module control bits, not PxSEL). |
| 27 | P3.2/S15 | bidirectional | General-purpose digital I/O; LCD segment output 15 (LCD function selected by LCD module control bits, not PxSEL). |
| 28 | P3.1/S16 | bidirectional | General-purpose digital I/O; LCD segment output 16 (LCD function selected by LCD module control bits, not PxSEL). |
| 29 | P3.0/S17 | bidirectional | General-purpose digital I/O; LCD segment output 17 (LCD function selected by LCD module control bits, not PxSEL). |
| 30 | P2.7/SIFCLKG/S18 | bidirectional | General-purpose digital I/O; Scan IF signal SIFCLKG from the internal clock generator, and LCD segment output 18. |
| 31 | P2.6/CAOUT/S19 | bidirectional | General-purpose digital I/O; Comparator_A output, and LCD segment output 19. |
| 32 | P2.5/TA1CLK/S20 | bidirectional | General-purpose digital I/O; input of Timer1_A clock, and LCD segment output 20. |
| 33 | P2.4/TA1.4/S21 | bidirectional | General-purpose digital I/O; Timer1_A capture CCI4A input and compare Out4 output, and LCD segment output 21. |
| 34 | P2.3/TA1.3/S22 | bidirectional | General-purpose digital I/O; Timer1_A capture CCI3A input and compare Out3 output, and LCD segment output 22. |
| 35 | P2.2/TA1.2/S23 | bidirectional | General-purpose digital I/O; Timer1_A capture CCI2A input and compare Out2 output, and LCD segment output 23. |
| 36 | COM0 | output | LCD common output used for LCD backplane COM0. |
| 37 | P5.2/COM1 | bidirectional | General-purpose digital I/O; LCD common output COM1 for LCD backplanes. |
| 38 | P5.3/COM2 | bidirectional | General-purpose digital I/O; LCD common output COM2 for LCD backplanes. |
| 39 | P5.4/COM3 | bidirectional | General-purpose digital I/O; LCD common output COM3 for LCD backplanes. |
| 40 | R03 | input | Input port for the fourth (lowest) positive analog LCD level (V5). |
| 41 | P5.5/R13 | bidirectional | General-purpose digital I/O; input port for the third most positive analog LCD level (V4 or V3). |
| 42 | P5.6/R23 | bidirectional | General-purpose digital I/O; input port for the second most positive analog LCD level (V2). |
| 43 | P5.7/R33 | bidirectional | General-purpose digital I/O; output port of the most positive analog LCD level (V1). |
| 44 | P2.1/TA1.1 | bidirectional | General-purpose digital I/O; Timer0_A capture CCI1A input and compare Out1 output. |
| 45 | P2.0/TA0.2 | bidirectional | General-purpose digital I/O; Timer0_A capture CCI2A input and compare Out2 output. |
| 46 | P1.7/CA1 | bidirectional | General-purpose digital I/O; Comparator_A input. |
| 47 | P1.6/CA0 | bidirectional | General-purpose digital I/O; Comparator_A input. |
| 48 | P1.5/TA0CLK/ACLK | bidirectional | General-purpose digital I/O; input of the Timer0_A clock, and ACLK output. |
| 49 | P1.4/TA1.0 | bidirectional | General-purpose digital I/O; Timer1_A capture CCI0A input and compare Out0 output. |
| 50 | P1.3/TA1.0/SVSOUT | bidirectional | General-purpose digital I/O; Timer1_A capture CCI0B input (TA1.0 is input only on this pin), and SVS comparator output. |
| 51 | P1.2/TA0.1 | bidirectional | General-purpose digital I/O; Timer0_A capture CCI1A input and compare Out1 output. |
| 52 | P1.1/TA0.0/MCLK | bidirectional | General-purpose digital I/O; Timer0_A capture CCI0B input (TA0.0 is input only on this pin), MCLK output, and BSL receive. |
| 53 | P1.0/TA0.0 | bidirectional | General-purpose digital I/O; Timer0_A capture CCI0A input and compare Out0 output, and BSL transmit. |
| 54 | TDO/TDI | bidirectional | Test data output port; TDO/TDI data output or programming data input terminal. |
| 55 | TDI/TCLK | input | Test data input or test clock input; the device protection fuse is connected to this terminal. |
| 56 | TMS | input | Test mode select; used as an input port for device programming and test. |
| 57 | TCK | input | Test clock; the clock input port for device programming and test. |
| 58 | RST/NMI | input | Reset input or nonmaskable interrupt input port. |
| 59 | P6.0/SIFCH0 | bidirectional | General-purpose digital I/O; Scan IF channel 0 sensor excitation output and signal input. |
| 60 | P6.1/SIFCH1 | bidirectional | General-purpose digital I/O; Scan IF channel 1 sensor excitation output and signal input. |
| 61 | P6.2/SIFCH2 | bidirectional | General-purpose digital I/O; Scan IF channel 2 sensor excitation output and signal input. |
| 62 | AVSS | power_in | Analog supply voltage, negative terminal; must be externally connected to DVSS and is internally connected to DVSS. |
| 63 | DVSS | power_in | Digital supply voltage, negative terminal (ground). |
| 64 | AVCC | power_in | Analog supply voltage, positive terminal supplying SVS, brownout, oscillator, comparator_A, scan IF AFE, port 6 and LCD resistive divider; must not power up prior to DVCC. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
MSP430FW428IPMR - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
msp430fw428ipmr-etched.step/msp430fw428ipmr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430fw428ipmr.step/msp430fw428ipmr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (63 pp, sha256
55924aec33090f61, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).