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MSP430FR6972IRGCR

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Texas Instruments Microcontroller Units (MCUs/MPUs/SOCs), VQFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MSP430FR6972IRGCR

Texas Instruments · Microcontroller Units (MCUs/MPUs/SOCs) · VQFN-64-EP(9x9)

MSP430FR6972IRGCR from Texas Instruments, in a VQFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P4.3 bidirectional General-purpose digital I/O port, also functions as UCA0SOMI (SPI slave in/master out), UCA0RXD (UART receive), UCB1STE (SPI slave transmit enable), and LCD segment output
2 P1.4 bidirectional General-purpose digital I/O port, also functions as UCB0CLK (I2C/SPI clock), UCA0STE (SPI slave transmit enable), TA1.0 (Timer_A capture/compare), and LCD segment output
3 P1.5 bidirectional General-purpose digital I/O port, also functions as UCB0STE (SPI slave transmit enable), UCA0CLK (I2C/SPI clock), TA0.0 (Timer_A capture/compare), and LCD segment output
4 P1.6 bidirectional General-purpose digital I/O port, also functions as UCB0SIMO (I2C/SPI slave in/master out), UCB0SDA (I2C data), TA0.1 (Timer_A capture/compare), and LCD segment output
5 P1.7 bidirectional General-purpose digital I/O port, also functions as UCB0SOMI (I2C/SPI slave out/master in), UCB0SCL (I2C clock), TA0.2 (Timer_A capture/compare), and LCD segment output
6 R33/LCDCAP passive LCD capacitor connection for regulated LCD voltage generation
7 P6.0 bidirectional General-purpose digital I/O port, also functions as R23 (LCD voltage divider output)
8 P6.1 bidirectional General-purpose digital I/O port, also functions as R13 (LCD voltage divider) and LCDREF (external LCD reference input)
9 P6.2 bidirectional General-purpose digital I/O port, also functions as COUT (comparator output) and R03 (LCD voltage divider)
10 P6.3 bidirectional General-purpose digital I/O port, also functions as COM0 (LCD common line driver output)
11 P6.4 bidirectional General-purpose digital I/O port, also functions as TB0.0 (Timer_B capture/compare), COM1 (LCD common output), and LCD segment output
12 P6.5 bidirectional General-purpose digital I/O port, also functions as TB0.1 (Timer_B capture/compare), COM2 (LCD common output), and LCD segment output
13 P6.6 bidirectional General-purpose digital I/O port, also functions as TB0.2 (Timer_B capture/compare), COM3 (LCD common output), and LCD segment output
14 P3.0 bidirectional General-purpose digital I/O port, also functions as UCB1CLK (I2C/SPI clock), TA3.2 (Timer_A capture/compare), and LCD segment output
15 P3.1 bidirectional General-purpose digital I/O port, also functions as UCB1SIMO/UCB1SDA (I2C/SPI), TA3.3 (Timer_A capture/compare), and LCD segment output
16 P3.2 bidirectional General-purpose digital I/O port, also functions as UCB1SOMI/UCB1SCL (I2C/SPI), TA3.4 (Timer_A capture/compare), and LCD segment output
17 DVSS1 power_in Digital ground supply (VSS)
18 DVCC1 power_in Digital power supply (1.8V to 3.6V)
19 TEST input Test mode pin for selecting digital I/O function on JTAG pins instead of JTAG mode
20 RST/NMI input Reset input (active low) or nonmaskable interrupt input with internal pullup
21 PJ.0 bidirectional General-purpose digital I/O port, also functions as TDO (JTAG test data output), TB0OUTH (Timer_B PWM output control), SMCLK (system clock output), and debug status register bit
22 PJ.1 bidirectional General-purpose digital I/O port, also functions as TDI/TCLK (JTAG test data input/test clock), MCLK (master clock output), and debug status register bit
23 PJ.2 bidirectional General-purpose digital I/O port, also functions as TMS (JTAG test mode select), ACLK (auxiliary clock output), and debug status register bit
24 PJ.3 bidirectional General-purpose digital I/O port, also functions as TCK (JTAG test clock), COUT (comparator output), and debug status register bit
25 P3.3 bidirectional General-purpose digital I/O port, also functions as TA1.1 (Timer_A capture/compare), TB0CLK (Timer_B clock input), and LCD segment output
26 P3.4 bidirectional General-purpose digital I/O port, also functions as UCA1SIMO/UCA1TXD (UART/SPI), TB0.0 (Timer_B capture/compare), and LCD segment output
27 P3.5 bidirectional General-purpose digital I/O port, also functions as UCA1SOMI/UCA1RXD (UART/SPI), TB0.1 (Timer_B capture/compare), and LCD segment output
28 P3.6 bidirectional General-purpose digital I/O port, also functions as UCA1CLK (I2C/SPI clock), TB0.2 (Timer_B capture/compare), and LCD segment output
29 P3.7 bidirectional General-purpose digital I/O port, also functions as UCA1STE (SPI slave transmit enable), TB0.3 (Timer_B capture/compare), and LCD segment output
30 P2.3 bidirectional General-purpose digital I/O port, also functions as UCA0STE (SPI slave transmit enable), TB0OUTH (Timer_B PWM high impedance control), and LCD segment output
31 P2.2 bidirectional General-purpose digital I/O port, also functions as UCA0CLK (I2C/SPI clock), TB0.4 (Timer_B capture/compare), RTCCLK (RTC clock output), and LCD segment output
32 P2.1 bidirectional General-purpose digital I/O port, also functions as UCA0SOMI/UCA0RXD (UART/SPI slave out/master in), TB0.5 (Timer_B capture/compare), DMAE0 (DMA trigger), and LCD segment output
33 P2.0 bidirectional General-purpose digital I/O port, also functions as UCA0SIMO/UCA0TXD (UART/SPI), TB0.6 (Timer_B capture/compare), TB0CLK (Timer_B clock), and LCD segment output
34 P7.0 bidirectional General-purpose digital I/O port, also functions as TA0CLK (Timer_A clock input) and LCD segment output
35 P7.1 bidirectional General-purpose digital I/O port, also functions as TA0.0 (Timer_A capture/compare), ACLK (auxiliary clock output), and LCD segment output
36 P7.2 bidirectional General-purpose digital I/O port, also functions as TA0.1 (Timer_A capture/compare) and LCD segment output
37 P7.3 bidirectional General-purpose digital I/O port, also functions as TA0.2 (Timer_A capture/compare) and LCD segment output
38 P7.4 bidirectional General-purpose digital I/O port, also functions as SMCLK (system master clock output) and LCD segment output
39 DVSS2 power_in Digital ground supply (VSS)
40 DVCC2 power_in Digital power supply (1.8V to 3.6V)
41 P1.3 bidirectional General-purpose digital I/O port, also functions as TA1.2 (Timer_A capture/compare), A3 (ADC analog input), and C3 (comparator analog input)
42 P1.2 bidirectional General-purpose digital I/O port, also functions as TA1.1 (Timer_A capture/compare), TA0CLK (Timer_A clock), COUT (comparator output), A2 (ADC analog input), and C2 (comparator input)
43 P1.1 bidirectional General-purpose digital I/O port, also functions as TA0.2 (Timer_A capture/compare), TA1CLK (Timer_A clock), COUT (comparator output), A1 (ADC input), C1 (comparator input), VREF+ (positive reference output 1.5V or 2.5V), and VeREF+ (external reference input)
44 P1.0 bidirectional General-purpose digital I/O port, also functions as TA0.1 (Timer_A capture/compare), DMAE0 (DMA trigger), RTCCLK (RTC clock output), A0 (ADC input), C0 (comparator input), VREF- (negative reference output), and VeREF- (external reference input)
45 P9.4 bidirectional General-purpose digital I/O port, also functions as A12 (ADC analog input 12) and C12 (comparator analog input)
46 P9.5 bidirectional General-purpose digital I/O port, also functions as A13 (ADC analog input 13) and C13 (comparator analog input)
47 P9.6 bidirectional General-purpose digital I/O port, also functions as A14 (ADC analog input 14) and C14 (comparator analog input)
48 P9.7 bidirectional General-purpose digital I/O port, also functions as A15 (ADC analog input 15) and C15 (comparator analog input)
49 AVCC1 power_in Analog power supply (1.8V to 3.6V) with 100nF and 1µF decoupling capacitors required
50 AVSS1 power_in Analog ground supply (VSS)
51 PJ.4 bidirectional General-purpose digital I/O port, also functions as LFXIN (low-frequency crystal oscillator input or external clock input at 32kHz)
52 PJ.5 bidirectional General-purpose digital I/O port, also functions as LFXOUT (low-frequency crystal oscillator output terminal)
53 AVSS2 power_in Analog ground supply (VSS)
54 PJ.7 bidirectional General-purpose digital I/O port, also functions as HFXOUT (high-frequency crystal oscillator output terminal at 4-16MHz)
55 PJ.6 bidirectional General-purpose digital I/O port, also functions as HFXIN (high-frequency crystal oscillator input or external clock input at 4-16MHz)
56 AVSS3 power_in Analog ground supply (VSS) with separate connection to ground plane recommended
57 P5.7 bidirectional General-purpose digital I/O port, also functions as UCA1STE (SPI slave transmit enable), TB0CLK (Timer_B clock input), and LCD segment output
58 P4.4 bidirectional General-purpose digital I/O port, also functions as UCB1STE (SPI slave transmit enable), TA1CLK (Timer_A clock input), and LCD segment output
59 P4.5 bidirectional General-purpose digital I/O port, also functions as UCB1CLK (I2C/SPI clock), TA1.0 (Timer_A capture/compare), and LCD segment output
60 P4.6 bidirectional General-purpose digital I/O port, also functions as UCB1SIMO/UCB1SDA (I2C/SPI slave in/master out or data), TA1.1 (Timer_A capture/compare), and LCD segment output
61 P4.7 bidirectional General-purpose digital I/O port, also functions as UCB1SOMI/UCB1SCL (I2C/SPI slave out/master in or clock), TA1.2 (Timer_A capture/compare), and LCD segment output
62 DVSS3 power_in Digital ground supply (VSS)
63 DVCC3 power_in Digital power supply (1.8V to 3.6V)
64 P4.2 bidirectional General-purpose digital I/O port, also functions as UCA0SIMO/UCA0TXD (UART/SPI slave in/master out or transmit), UCB1CLK (I2C/SPI clock), and LCD segment output
65 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-64-EP(9x9)
Category Single Chip Microcomputer/Microcontroller
Pins 65

CAD (KiCad official)

  • Symbol: MSP430FR6972IRGCR
  • Footprint: Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
  • 3D model: VQFN-64-EP(9x9) (KiCad packages3D, STEP)
  • 3D model files: msp430fr6972irgcr-etched.step / msp430fr6972irgcr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430fr6972irgcr.step / msp430fr6972irgcr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (164 pp, sha256 acfa8c28f070a26c, retrieved 2026-10-03, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF