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MSP430FR6972IPMR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430FR6972IPMR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
MSP430FR6972IPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P4.3 | bidirectional | General-purpose digital I/O port pin with optional pull-up/pull-down; secondary functions include UCA0SOMI, UCA0RXD, UCB1STE, and LCD segment S4. |
| 2 | P1.4 | bidirectional | General-purpose digital I/O port pin with optional pull-up/pull-down; secondary functions include UCB0CLK, UCA0STE, TA1.0, and LCD segment S3. |
| 3 | P1.5 | bidirectional | General-purpose digital I/O port pin with optional pull-up/pull-down; secondary functions include UCB0STE, UCA0CLK, TA0.0, and LCD segment S2. |
| 4 | P1.6 | bidirectional | General-purpose digital I/O port pin with optional pull-up/pull-down; secondary functions include UCB0SIMO/SDA, TA0.1, and LCD segment S1. |
| 5 | P1.7 | bidirectional | General-purpose digital I/O port pin with optional pull-up/pull-down; secondary functions include UCB0SOMI/SCL, TA0.2, and LCD segment S0. |
| 6 | R33/LCDCAP | bidirectional | LCD capacitor connection or I/O port function; connects to external capacitor for LCD charge pump or GPIO. |
| 7 | P6.0 | bidirectional | General-purpose digital I/O or LCD R23 voltage divider output for LCD bias network. |
| 8 | P6.1 | bidirectional | General-purpose digital I/O or LCD R13 voltage divider output for LCD reference voltage. |
| 9 | P6.2 | bidirectional | General-purpose digital I/O or R03 LCD voltage divider output; can also output comparator result (COUT). |
| 10 | P6.3 | bidirectional | General-purpose digital I/O or LCD common output COM0 for backplane drive. |
| 11 | P6.4 | bidirectional | General-purpose digital I/O or LCD COM1 backplane output; secondary functions include TB0.0 timer and LCD segment S30. |
| 12 | P6.5 | bidirectional | General-purpose digital I/O or LCD COM2 backplane output; secondary functions include TB0.1 timer and LCD segment S29. |
| 13 | P6.6 | bidirectional | General-purpose digital I/O or LCD COM3 backplane output; secondary functions include TB0.2 timer and LCD segment S28. |
| 14 | P3.0 | bidirectional | General-purpose digital I/O; secondary functions include UCB1CLK (I2C/SPI) and TA3.2 timer with LCD segment S27. |
| 15 | P3.1 | bidirectional | General-purpose digital I/O; secondary functions include UCB1SIMO/SDA (I2C/SPI) and TA3.3 timer with LCD segment S26. |
| 16 | P3.2 | bidirectional | General-purpose digital I/O; secondary functions include UCB1SOMI/SCL (I2C/SPI) and TA3.4 timer with LCD segment S25. |
| 17 | DVSS1 | power_in | Digital ground (0 V reference) for digital power supply decoupling. |
| 18 | DVCC1 | power_in | Digital power supply; requires 1.8-3.6 V with 100 nF low-ESR ceramic capacitor placed within millimeters of this pin. |
| 19 | TEST | input | Test mode pin with internal pull-down; selects digital I/O function on JTAG pins when low. |
| 20 | RST/NMI/SBWTDIO | bidirectional | Reset input (active low) or nonmaskable interrupt or Spy-Bi-Wire debug data pin; internal pull-up available. |
| 21 | PJ.0 | bidirectional | General-purpose digital I/O or JTAG output TDO or Timer_B0 high impedance output or SMCLK output. |
| 22 | PJ.1 | bidirectional | General-purpose digital I/O or JTAG input TDI/TCLK or MCLK output with pull-up in JTAG mode. |
| 23 | PJ.2 | bidirectional | General-purpose digital I/O or JTAG input TMS or ACLK output with pull-up in JTAG mode. |
| 24 | PJ.3 | bidirectional | General-purpose digital I/O or JTAG input TCK or comparator output COUT with pull-up in JTAG mode. |
| 25 | P3.3 | bidirectional | General-purpose digital I/O; secondary functions include TA1.1 timer, TB0 clock input, and LCD segment S24. |
| 26 | P3.4 | bidirectional | General-purpose digital I/O; secondary functions include UCA1SIMO/TXD (UART/SPI), TB0.0 timer, and LCD segment S23. |
| 27 | P3.5 | bidirectional | General-purpose digital I/O; secondary functions include UCA1SOMI/RXD (UART/SPI), TB0.1 timer, and LCD segment S22. |
| 28 | P3.6 | bidirectional | General-purpose digital I/O; secondary functions include UCA1CLK (UART/SPI), TB0.2 timer, and LCD segment S21. |
| 29 | P3.7 | bidirectional | General-purpose digital I/O; secondary functions include UCA1STE (SPI), TB0.3 timer, and LCD segment S20. |
| 30 | P2.3 | bidirectional | General-purpose digital I/O; secondary functions include UCA0STE (SPI), TB0 high impedance output, and LCD segment S19. |
| 31 | P2.2 | bidirectional | General-purpose digital I/O; secondary functions include UCA0CLK (UART/SPI), TB0.4 timer, RTCCLK output, and LCD segment S18. |
| 32 | P2.1 | bidirectional | General-purpose digital I/O; secondary functions include UCA0SOMI/RXD (UART/SPI), TB0.5 timer, DMA trigger, and LCD segment S17. |
| 33 | P2.0 | bidirectional | General-purpose digital I/O; secondary functions include UCA0SIMO/TXD (UART/SPI), TB0.6 timer, TB0 clock, and LCD segment S16. |
| 34 | P7.0 | bidirectional | General-purpose digital I/O; secondary functions include TA0 clock input and LCD segment S15. |
| 35 | P7.1 | bidirectional | General-purpose digital I/O; secondary functions include TA0.0 timer, ACLK output, and LCD segment S14. |
| 36 | P7.2 | bidirectional | General-purpose digital I/O; secondary functions include TA0.1 timer capture/compare and LCD segment S13. |
| 37 | P7.3 | bidirectional | General-purpose digital I/O; secondary functions include TA0.2 timer capture/compare and LCD segment S12. |
| 38 | P7.4 | bidirectional | General-purpose digital I/O; secondary functions include SMCLK output and LCD segment S11. |
| 39 | DVSS2 | power_in | Digital ground (0 V reference) for digital power supply decoupling. |
| 40 | DVCC2 | power_in | Digital power supply; requires 1.8-3.6 V with 100 nF low-ESR ceramic capacitor placed within millimeters of this pin. |
| 41 | P1.3 | bidirectional | General-purpose digital I/O with analog function; secondary functions include TA1.2 timer and ADC input A3 or comparator input C3. |
| 42 | P1.2 | bidirectional | General-purpose digital I/O with analog function; secondary functions include TA1.1 timer, TA0 clock, comparator output COUT, and ADC input A2 or comparator input C2. |
| 43 | P1.1 | bidirectional | General-purpose digital I/O with analog function; secondary functions include TA0.2 timer, TA1 clock, COUT, VREF+ output, and ADC input A1 or comparator input C1. |
| 44 | P1.0 | bidirectional | General-purpose digital I/O with analog function; secondary functions include TA0.1 timer, DMA trigger, RTCCLK output, VREF- output, and ADC input A0 or comparator input C0. |
| 45 | P9.4 | bidirectional | General-purpose digital I/O with analog function; secondary functions include ADC input A12 and comparator input C12. |
| 46 | P9.5 | bidirectional | General-purpose digital I/O with analog function; secondary functions include ADC input A13 and comparator input C13. |
| 47 | P9.6 | bidirectional | General-purpose digital I/O with analog function; secondary functions include ADC input A14 and comparator input C14. |
| 48 | P9.7 | bidirectional | General-purpose digital I/O with analog function; secondary functions include ADC input A15 and comparator input C15. |
| 49 | AVCC1 | power_in | Analog power supply; requires 1.8-3.6 V with 100 nF low-ESR ceramic capacitor placed within millimeters of this pin. |
| 50 | AVSS1 | power_in | Analog ground (0 V reference) for analog power supply decoupling. |
| 51 | PJ.4 | bidirectional | General-purpose digital I/O or LFXIN input for 32 kHz crystal oscillator (XIN terminal) in crystal mode or bypass input in bypass mode. |
| 52 | PJ.5 | bidirectional | General-purpose digital I/O or LFXOUT output for 32 kHz crystal oscillator (XOUT terminal) in crystal mode. |
| 53 | AVSS2 | power_in | Analog ground (0 V reference) for crystal oscillator circuit and general analog decoupling. |
| 54 | PJ.7 | bidirectional | General-purpose digital I/O or HFXOUT output terminal for high-frequency crystal oscillator (XT2) in crystal mode. |
| 55 | PJ.6 | bidirectional | General-purpose digital I/O or HFXIN input terminal for high-frequency crystal oscillator (XT2) in crystal mode or bypass input in bypass mode. |
| 56 | AVSS3 | power_in | Analog ground (0 V reference) for high-frequency crystal oscillator circuit decoupling. |
| 57 | P5.7 | bidirectional | General-purpose digital I/O; secondary functions include UCA1STE (SPI), TB0 clock input, and LCD segment S10. |
| 58 | P4.4 | bidirectional | General-purpose digital I/O; secondary functions include UCB1STE (I2C/SPI), TA1 clock input, and LCD segment S9. |
| 59 | P4.5 | bidirectional | General-purpose digital I/O; secondary functions include UCB1CLK (I2C/SPI), TA1.0 capture/compare, and LCD segment S8. |
| 60 | P4.6 | bidirectional | General-purpose digital I/O; secondary functions include UCB1SIMO/SDA (I2C/SPI), TA1.1 timer, and LCD segment S7. |
| 61 | P4.7 | bidirectional | General-purpose digital I/O; secondary functions include UCB1SOMI/SCL (I2C/SPI), TA1.2 timer, and LCD segment S6. |
| 62 | DVSS3 | power_in | Digital ground (0 V reference) for digital power supply decoupling. |
| 63 | DVCC3 | power_in | Digital power supply; requires 1.8-3.6 V with 100 nF low-ESR ceramic capacitor placed within millimeters of this pin. |
| 64 | P4.2 | bidirectional | General-purpose digital I/O; secondary functions include UCA0SIMO/TXD (UART/SPI), UCB1CLK (I2C/SPI), and LCD segment S5. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
MSP430FR6972IPMR - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
msp430fr6972ipmr-etched.step/msp430fr6972ipmr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430fr6972ipmr.step/msp430fr6972ipmr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (164 pp, sha256
acfa8c28f070a26c, retrieved 2026-09-24, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).