component
MSP430FR5992IPMR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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MSP430FR5992IPMR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
MSP430FR5992IPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.0 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TA0.1, DMAE0, RTCCLK, ADC input A0/comparator C0, VREF- output and VeREF- input, powered from DVCC with reset state OFF. |
| 2 | P1.1 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TA0.2, TA1CLK, COUT, ADC input A1/comparator C1, VREF+ output and VeREF+ input, powered from DVCC with reset state OFF. |
| 3 | P1.2 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TA1.1, TA0CLK, COUT, and ADC input A2/comparator C2, powered from DVCC with reset state OFF. |
| 4 | P3.0 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as ADC input A12/comparator C12, powered from DVCC with reset state OFF. |
| 5 | P3.1 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as ADC input A13/comparator C13, powered from DVCC. |
| 6 | P3.2 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as ADC input A14/comparator C14, powered from DVCC with reset state OFF. |
| 7 | P3.3 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as ADC input A15/comparator C15, powered from DVCC with reset state OFF. |
| 8 | P4.7 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, powered from DVCC with reset state OFF. |
| 9 | P7.0 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as eUSCI_B2 UCB2SIMO/UCB2SDA, powered from DVCC with reset state OFF. |
| 10 | P7.1 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as eUSCI_B2 UCB2SOMI/UCB2SCL, powered from DVCC with reset state OFF. |
| 11 | P8.0 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, powered from DVCC with reset state OFF. |
| 12 | P1.3 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TA1.2, UCB0STE and ADC input A3/comparator C3, powered from DVCC with reset state OFF. |
| 13 | P1.4 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TB0.1, UCA0STE and ADC input A4/comparator C4, powered from DVCC with reset state OFF. |
| 14 | P1.5 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TB0.2, UCA0CLK and ADC input A5/comparator C5, powered from DVCC with reset state OFF. |
| 15 | DVSS2 | power_in | Digital ground supply for the digital I/O and core (0 V reference for all VSS pins). |
| 16 | DVCC2 | power_in | Digital power supply; VCC is specified 1.8 V to 3.6 V at all DVCC and AVCC pins. |
| 17 | PJ.0 | bidirectional | General-purpose digital I/O, also multiplexed as JTAG TDO, TB0OUTH, SMCLK, SRSCG1 and comparator input C6; when used as a JTAG pin it should remain open, with reset state OFF. |
| 18 | PJ.1 | bidirectional | General-purpose digital I/O, also multiplexed as JTAG TDI/TCLK, MCLK, SRSCG0 and comparator input C7; when used as a JTAG pin it should remain open, with reset state OFF. |
| 19 | PJ.2 | bidirectional | General-purpose digital I/O, also multiplexed as JTAG TMS, ACLK, SROSCOFF and comparator input C8; when used as a JTAG pin it should remain open. |
| 20 | PJ.3 | bidirectional | General-purpose digital I/O, also multiplexed as JTAG TCK, SRCPUOFF and comparator input C9; when used as a JTAG pin it should remain open. |
| 21 | P7.2 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as eUSCI_B2 UCB2CLK, powered from DVCC. |
| 22 | P7.3 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as eUSCI_B2 UCB2STE and TA4.1, powered from DVCC. |
| 23 | P7.4 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TA4.0 and ADC input A16, powered from DVCC. |
| 24 | P4.0 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as ADC input A8, powered from DVCC. |
| 25 | P4.1 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as ADC input A9, powered from DVCC. |
| 26 | P4.2 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as ADC input A10, powered from DVCC. |
| 27 | P4.3 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as ADC input A11, powered from DVCC. |
| 28 | P2.5 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TB0.0, UCA1TXD/UCA1SIMO, powered from DVCC. |
| 29 | P2.6 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TB0.1, UCA1RXD/UCA1SOMI, powered from DVCC. |
| 30 | TEST/SBWTCK | input | Test mode pin that selects digital I/O on the JTAG pins and serves as Spy-Bi-Wire input clock; it always has an internal pulldown of 20 to 50 kΩ enabled. |
| 31 | RST/NMI/SBWTDIO | bidirectional | Active-low reset input or nonmaskable interrupt input, also Spy-Bi-Wire data input/output; typically driven through a 47 kΩ pullup (or internal pullup) with 10 nF pulldown. |
| 32 | P2.0 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TB0.6, UCA0TXD/UCA0SIMO, TB0CLK and ACLK; on UART-BSL devices this pin is BSLTX. |
| 33 | P2.1 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TB0.0 and UCA0RXD/UCA0SOMI; on UART-BSL devices this pin is BSLRX. |
| 34 | P2.2 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TB0.2 and UCB0CLK, powered from DVCC. |
| 35 | P3.4 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TB0.3 and SMCLK, powered from DVCC. |
| 36 | P3.5 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TB0.4 and COUT, powered from DVCC. |
| 37 | P3.6 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TB0.5, powered from DVCC. |
| 38 | P3.7 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TB0.6, powered from DVCC. |
| 39 | P1.6 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TB0.3, UCB0SIMO/UCB0SDA and TA0.0, powered from DVCC. |
| 40 | P1.7 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TB0.4, UCB0SOMI/UCB0SCL and TA1.0, powered from DVCC. |
| 41 | P5.0 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as UCB1SIMO/UCB1SDA, powered from DVCC. |
| 42 | P5.1 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as UCB1SOMI/UCB1SCL, powered from DVCC. |
| 43 | P5.2 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as UCB1CLK and TA4CLK, powered from DVCC. |
| 44 | P5.3 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as UCB1STE, powered from DVCC. |
| 45 | P4.4 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TB0.5 capture input CCI5B, powered from DVCC. |
| 46 | P4.5 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, powered from DVCC. |
| 47 | P4.6 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, powered from DVCC. |
| 48 | DVSS1 | power_in | Digital ground supply for the digital I/O and core (0 V reference). |
| 49 | DVCC1 | power_in | Digital power supply; VCC is specified 1.8 V to 3.6 V at all DVCC and AVCC pins. |
| 50 | P2.7 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, powered from DVCC. |
| 51 | P2.3 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TA0.0, UCA1STE and ADC input A6/comparator C10, powered from DVCC. |
| 52 | P2.4 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as TA1.0, UCA1CLK and ADC input A7/comparator C11, powered from DVCC. |
| 53 | P5.4 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as UCA2TXD/UCA2SIMO and TB0OUTH, powered from DVCC. |
| 54 | P5.5 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as UCA2RXD/UCA2SOMI and ACLK, powered from DVCC. |
| 55 | P5.6 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as UCA2CLK, TA4.0 and SMCLK, powered from DVCC. |
| 56 | P5.7 | bidirectional | General-purpose digital I/O with port interrupt and LPMx.5 wake-up, also multiplexed as UCA2STE, TA4.1 and MCLK, powered from DVCC. |
| 57 | AVSS3 | power_in | Analog ground supply for the analog modules (0 V reference). |
| 58 | PJ.6 | bidirectional | General-purpose digital I/O, also the HFXIN input of the high-frequency crystal oscillator (HFXT) when crystal or bypass mode is selected. |
| 59 | PJ.7 | bidirectional | General-purpose digital I/O with reset state OFF, also the HFXOUT output of the high-frequency crystal oscillator (HFXT) when crystal mode is selected. |
| 60 | AVSS2 | power_in | Analog ground supply for the analog modules (0 V reference). |
| 61 | PJ.4 | bidirectional | General-purpose digital I/O with reset state OFF, also the LFXIN input of the low-frequency crystal oscillator (LFXT) when crystal or bypass mode is selected. |
| 62 | PJ.5 | bidirectional | General-purpose digital I/O with reset state OFF, also the LFXOUT output of the low-frequency crystal oscillator (LFXT) when crystal mode is selected. |
| 63 | AVSS1 | power_in | Analog ground supply for the analog modules (0 V reference). |
| 64 | AVCC1 | power_in | Analog power supply; VCC is specified 1.8 V to 3.6 V and AVCC should be powered from the same source as DVCC. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
MSP430FR5992IPMR - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
msp430fr5992ipmr-etched.step/msp430fr5992ipmr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430fr5992ipmr.step/msp430fr5992ipmr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (177 pp, sha256
305369231542d625, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).