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MSP430FR59691IRGZR
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Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430FR59691IRGZR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · VQFN-48-EP(7x7)
MSP430FR59691IRGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.0/TA0.1/DMAE0/RTCCLK/A0/C0/VREF-/VeREF- | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TA0 CCR1, external DMA trigger, RTC clock output, ADC input A0, comparator input C0, and negative reference pins. |
| 2 | P1.1/TA0.2/TA1CLK/COUT/A1/C1/VREF+/VeREF+ | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TA0 CCR2, TA1 input clock, comparator output, ADC input A1, comparator input C1, and positive reference pins. |
| 3 | P1.2/TA1.1/TA0CLK/COUT/A2/C2 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TA1 CCR1, TA0 input clock, comparator output, ADC input A2, and comparator input C2. |
| 4 | P3.0/A12/C12 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also ADC input A12 and comparator input C12. |
| 5 | P3.1/A13/C13 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also ADC input A13 and comparator input C13. |
| 6 | P3.2/A14/C14 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also ADC input A14 and comparator input C14. |
| 7 | P3.3/A15/C15 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also ADC input A15 and comparator input C15. |
| 8 | P4.7 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5; this pin exists only in the 48-pin RGZ package. |
| 9 | P1.3/TA1.2/UCB0STE/A3/C3 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TA1 CCR2, eUSCI_B0 SPI slave transmit enable, ADC input A3, and comparator input C3. |
| 10 | P1.4/TB0.1/UCA0STE/A4/C4 | bidirectional | General-purpose digital I/O, also TB0 CCR1, eUSCI_A0 SPI slave transmit enable, ADC input A4, and comparator input C4. |
| 11 | P1.5/TB0.2/UCA0CLK/A5/C5 | bidirectional | General-purpose digital I/O, also TB0 CCR2, eUSCI_A0 clock (SPI), ADC input A5, and comparator input C5. |
| 12 | PJ.0/TDO/TB0OUTH/SMCLK/SRSCG1/C6 | bidirectional | General-purpose digital I/O, also JTAG TDO, TB0OUTH, SMCLK output, CPU status bit SCG1, and comparator input C6. |
| 13 | PJ.1/TDI/TCLK/MCLK/SRSCG0/C7 | bidirectional | General-purpose digital I/O, also JTAG TDI/TCLK, MCLK output, CPU status bit SCG0, and comparator input C7. |
| 14 | PJ.2/TMS/ACLK/SROSCOFF/C8 | bidirectional | General-purpose digital I/O, also JTAG TMS, ACLK output, CPU status bit OSCOFF, and comparator input C8. |
| 15 | PJ.3/TCK/SRCPUOFF/C9 | bidirectional | General-purpose digital I/O, also JTAG TCK, CPU status bit CPUOFF, and comparator input C9; JTAG pins stay open when used for JTAG. |
| 16 | P4.0/A8 | bidirectional | General-purpose digital I/O with ADC input A8. |
| 17 | P4.1/A9 | bidirectional | General-purpose digital I/O with ADC input A9. |
| 18 | P4.2/A10 | bidirectional | General-purpose digital I/O with ADC input A10. |
| 19 | P4.3/A11 | bidirectional | General-purpose digital I/O with ADC input A11. |
| 20 | P2.5/TB0.0/UCA1TXD/UCA1SIMO | bidirectional | General-purpose digital I/O, also TB0 CCR0 capture, and eUSCI_A1 transmit (UART) or SIMO (SPI). |
| 21 | P2.6/TB0.1/UCA1RXD/UCA1SOMI | bidirectional | General-purpose digital I/O, also TB0 CCR1, and eUSCI_A1 receive (UART) or SOMI (SPI). |
| 22 | TEST/SBWTCK | input | Test mode pin and Spy-Bi-Wire clock; it always has an internal pulldown enabled and should be left open when unused. |
| 23 | RST/NMI/SBWTDIO | bidirectional | Reset/NMI pin and Spy-Bi-Wire data; if unused, tie to DVCC or VCC with a 47-kΩ pullup (or internal pullup) and a 2.2-nF pulldown (10-nF if JTAG/SBW access is not needed). |
| 24 | P2.0/TB0.6/UCA0TXD/UCA0SIMO/TB0CLK/ACLK | bidirectional | General-purpose digital I/O, also TB0 CCR6, eUSCI_A0 transmit/SIMO, TB0CLK input, and ACLK output. |
| 25 | P2.1/TB0.0/UCA0RXD/UCA0SOMI/TB0.0 | bidirectional | General-purpose digital I/O, also TB0 CCR0, and eUSCI_A0 receive/SOMI; on UART-BSL devices this pin is BSLRX. |
| 26 | P2.2/TB0.2/UCB0CLK | bidirectional | General-purpose digital I/O, also TB0 CCR2 and eUSCI_B0 clock. |
| 27 | P3.4/TB0.3/SMCLK | bidirectional | General-purpose digital I/O, also TB0 CCR3 and SMCLK output. |
| 28 | P3.5/TB0.4/COUT | bidirectional | General-purpose digital I/O, also TB0 CCR4 and comparator output COUT. |
| 29 | P3.6/TB0.5 | bidirectional | General-purpose digital I/O, also TB0 CCR5 capture/compare. |
| 30 | P3.7/TB0.6 | bidirectional | General-purpose digital I/O, also TB0 CCR6 capture/compare. |
| 31 | P1.6/TB0.3/UCB0SIMO/UCB0SDA/TA0.0 | bidirectional | General-purpose digital I/O, also TB0 CCR3, eUSCI_B0 SIMO/I2C data (SDA), and TA0 CCR0; on I2C-BSL devices this pin is BSLSDA. |
| 32 | P1.7/TB0.4/UCB0SOMI/UCB0SCL/TA1.0 | bidirectional | General-purpose digital I/O, also TB0 CCR4, eUSCI_B0 SOMI/I2C clock (SCL), and TA1 CCR0; on I2C-BSL devices this pin is BSLSCL. |
| 33 | P4.4/TB0.5 | bidirectional | General-purpose digital I/O with TB0 CCR5 capture input B. |
| 34 | P4.5 | bidirectional | General-purpose digital I/O; this pin exists only in the 48-pin RGZ package. |
| 35 | P4.6 | bidirectional | General-purpose digital I/O; this pin exists only in the 48-pin RGZ package. |
| 36 | DVSS | power_in | Digital ground supply; TI recommends connecting the QFN pad to VSS. |
| 37 | DVCC | power_in | Digital power supply; VCC is 1.8 V to 3.6 V and a 1-µF capacitor with ±20% tolerance is required close to this pin. |
| 38 | P2.7 | bidirectional | General-purpose digital I/O with port interrupt and wakeup from LPMx.5. |
| 39 | P2.3/TA0.0/UCA1STE/A6/C10 | bidirectional | General-purpose digital I/O, also TA0 CCR0 capture input B, eUSCI_A1 SPI slave transmit enable, ADC input A6, and comparator input C10. |
| 40 | P2.4/TA1.0/UCA1CLK/A7/C11 | bidirectional | General-purpose digital I/O, also TA1 CCR0 capture input B, eUSCI_A1 clock, ADC input A7, and comparator input C11. |
| 41 | AVSS | power_in | Analog ground supply. |
| 42 | PJ.6/HFXIN | bidirectional | General-purpose digital I/O, also input for the high-frequency crystal oscillator HFXT (or bypass clock input). |
| 43 | PJ.7/HFXOUT | bidirectional | General-purpose digital I/O, also output for the high-frequency crystal oscillator HFXT. |
| 44 | AVSS | power_in | Analog ground supply. |
| 45 | PJ.4/LFXIN | bidirectional | General-purpose digital I/O, also input for the low-frequency crystal oscillator LFXT (or bypass clock input). |
| 46 | PJ.5/LFXOUT | bidirectional | General-purpose digital I/O, also output of the low-frequency crystal oscillator LFXT. |
| 47 | AVSS | power_in | Analog ground supply. |
| 48 | AVCC | power_in | Analog power supply; TI recommends powering AVCC and DVCC from the same source and keeping the difference within the absolute maximum limit. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-48-EP(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
MSP430FR59691IRGZR - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files:
msp430fr59691irgzr-etched.step/msp430fr59691irgzr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430fr59691irgzr.step/msp430fr59691irgzr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (147 pp, sha256
bb3c317d2c90abf5, retrieved 2026-10-10, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).