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MSP430FR5947IRHAR

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Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MSP430FR5947IRHAR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · VQFN-40-EP(6x6)

MSP430FR5947IRHAR from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P1.0/TA0.1/DMAE0/RTCCLK/A0/C0/VREF-/VeREF- bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TA0 CCR1 capture/compare, external DMA trigger, RTC clock calibration output, ADC analog input A0, comparator input C0, and negative reference output/input.
2 P1.1/TA0.2/TA1CLK/COUT/A1/C1/VREF+/VeREF+ bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TA0 CCR2 capture/compare, TA1 input clock, comparator output, ADC analog input A1, comparator input C1, and positive reference output/input.
3 P1.2/TA1.1/TA0CLK/COUT/A2/C2 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TA1 CCR1 capture/compare, TA0 input clock, comparator output, ADC analog input A2, and comparator input C2.
4 P3.0/A12/C12 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also ADC analog input A12 and comparator input C12.
5 P3.1/A13/C13 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also ADC analog input A13 and comparator input C13.
6 P3.2/A14/C14 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also ADC analog input A14 and comparator input C14.
7 P3.3/A15/C15 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also ADC analog input A15 and comparator input C15.
8 P1.3/TA1.2/UCB0STE/A3/C3 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TA1 CCR2 capture/compare, eUSCI_B0 SPI slave transmit enable, ADC analog input A3, and comparator input C3.
9 P1.4/TB0.1/UCA0STE/A4/C4 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0 CCR1 capture/compare, eUSCI_A0 slave transmit enable, ADC analog input A4, and comparator input C4.
10 P1.5/TB0.2/UCA0CLK/A5/C5 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0 CCR2 capture/compare, eUSCI_A0 clock signal, ADC analog input A5, and comparator input C5.
11 PJ.0/TDO/TB0OUTH/SMCLK/SRSCG1/C6 bidirectional General-purpose digital I/O that is also the JTAG TDO pin, with TB0OUTH, SMCLK output, CPU status bit SCG1 and comparator input C6 as alternate functions.
12 PJ.1/TDI/TCLK/MCLK/SRSCG0/C7 bidirectional General-purpose digital I/O that is also the JTAG TDI/TCLK pin, with MCLK output, CPU status bit SCG0 and comparator input C7 as alternate functions.
13 PJ.2/TMS/ACLK/SROSCOFF/C8 bidirectional General-purpose digital I/O that is also the JTAG TMS pin, with ACLK output, CPU status bit OSCOFF and comparator input C8 as alternate functions.
14 PJ.3/TCK/SRCPUOFF/C9 bidirectional General-purpose digital I/O that is also the JTAG TCK pin, with CPU status bit CPUOFF and comparator input C9 as alternate functions.
15 P4.0/A8 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also ADC analog input A8.
16 P4.1/A9 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also ADC analog input A9.
17 P2.5/TB0.0/UCA1TXD/UCA1SIMO bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0 CCR0 capture/compare, eUSCI_A1 UART transmit data or SPI master-out/slave-in.
18 P2.6/TB0.1/UCA1RXD/UCA1SOMI bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0 CCR1 capture/compare, eUSCI_A1 UART receive data or SPI master-in/slave-out.
19 TEST/SBWTCK input Test mode pin and Spy-Bi-Wire clock input; this pin always has an internal pulldown enabled and should be left open when unused.
20 RST/NMI/SBWTDIO bidirectional Reset input (or non-maskable interrupt input) and Spy-Bi-Wire data pin; for unused use, a 47-kΩ pullup or internal pullup with a 2.2-nF pulldown is recommended.
21 P2.0/TB0.6/UCA0TXD/UCA0SIMO/TB0CLK/ACLK bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0 CCR6 capture/compare, eUSCI_A0 UART transmit (BSLTX on UART BSL devices) or SPI master-out/slave-in, TB0 clock input and ACLK output.
22 P2.1/TB0.0/UCA0RXD/UCA0SOMI/TB0.0 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0 CCR0 capture/compare, eUSCI_A0 UART receive (BSLRX on UART BSL devices) or SPI master-in/slave-out.
23 P2.2/TB0.2/UCB0CLK bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0 CCR2 capture/compare and eUSCI_B0 clock signal.
24 P3.4/TB0.3/SMCLK bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0 CCR3 capture/compare and SMCLK output.
25 P3.5/TB0.4/COUT bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0 CCR4 capture/compare and comparator output COUT.
26 P3.6/TB0.5 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0 CCR5 capture/compare.
27 P3.7/TB0.6 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0 CCR6 capture/compare.
28 P1.6/TB0.3/UCB0SIMO/UCB0SDA/TA0.0 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0 CCR3 capture/compare, eUSCI_B0 SPI master-out/slave-in or I2C data (BSLSDA on I2C BSL devices), and TA0 CCR0 capture/compare.
29 P1.7/TB0.4/UCB0SOMI/UCB0SCL/TA1.0 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0 CCR4 capture/compare, eUSCI_B0 SPI master-in/slave-out or I2C clock (BSLSCL on I2C BSL devices), and TA1 CCR0 capture/compare.
30 P4.4/TB0.5 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0 CCR5 capture/compare input.
31 DVSS power_in Digital ground supply; TI recommends connecting the QFN pad to VSS.
32 DVCC power_in Digital power supply; a 1-µF capacitor in parallel with a 100-nF low-ESR ceramic capacitor is recommended close to this pin.
33 P2.7 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5.
34 P2.3/TA0.0/UCA1STE/A6/C10 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TA0 CCR0 capture/compare, eUSCI_A1 SPI slave transmit enable, ADC analog input A6 and comparator input C10.
35 P2.4/TA1.0/UCA1CLK/A7/C11 bidirectional General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TA1 CCR0 capture/compare, eUSCI_A1 clock signal, ADC analog input A7 and comparator input C11.
36 AVSS power_in Analog ground supply.
37 PJ.4/LFXIN bidirectional General-purpose digital I/O, or input for the low-frequency crystal oscillator LFXT (on the MSP430FR594x RHA package).
38 PJ.5/LFXOUT bidirectional General-purpose digital I/O, or output of the low-frequency crystal oscillator LFXT (on the MSP430FR594x RHA package).
39 AVSS power_in Analog ground supply.
40 AVCC power_in Analog power supply; TI recommends powering AVCC and DVCC from the same source.
41 QFN Pad passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-40-EP(6x6)
Category Embedded Processors & Controllers
Pins 41

CAD (KiCad official)

  • Symbol: MSP430FR5947IRHAR
  • Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
  • 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)
  • 3D model files: msp430fr5947irhar-etched.step / msp430fr5947irhar-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430fr5947irhar.step / msp430fr5947irhar.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (147 pp, sha256 bb3c317d2c90abf5, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF