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MSP430FR5889IPM

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Texas Instruments Microcontroller Units (MCUs/MPUs/SOCs), QFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MSP430FR5889IPM

Texas Instruments · Microcontroller Units (MCUs/MPUs/SOCs) · QFP-64(10x10)

MSP430FR5889IPM from Texas Instruments, in a QFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P4.3/UCA0SOMI/UCA0RXD/UCB1STE bidirectional General-purpose digital I/O that also serves as USCI_A0 SOMI/RXD (SPI slave out, UART receive) or USCI_B1 STE (SPI slave transmit enable).
2 P1.4/UCB0CLK/UCA0STE/TA1.0 bidirectional General-purpose digital I/O that also serves as USCI_B0 clock (SPI), USCI_A0 STE (SPI), or Timer_A TA1 CCR0 capture/compare output.
3 P1.5/UCB0STE/UCA0CLK/TA0.0 bidirectional General-purpose digital I/O that also serves as USCI_B0 STE (SPI), USCI_A0 clock (SPI), or Timer_A TA0 CCR0 capture/compare output.
4 P1.6/UCB0SIMO/UCB0SDA/TA0.1 bidirectional General-purpose digital I/O that also serves as USCI_B0 SIMO (SPI) or SDA (I2C), BSL data on the I2C BSL variant, or Timer_A TA0 CCR1 capture/compare output.
5 P1.7/UCB0SOMI/UCB0SCL/TA0.2 bidirectional General-purpose digital I/O that also serves as USCI_B0 SOMI (SPI) or SCL (I2C), BSL clock on the I2C BSL variant, or Timer_A TA0 CCR2 capture/compare output.
6 P2.4/TB0.3 bidirectional General-purpose digital I/O that also serves as Timer_B TB0 CCR3 capture/compare channel.
7 P2.5/TB0.4 bidirectional General-purpose digital I/O that also serves as Timer_B TB0 CCR4 capture/compare channel.
8 P2.6/TB0.5/ESIC1OUT bidirectional General-purpose digital I/O that also serves as Timer_B TB0 CCR5 capture/compare channel or ESI Comparator 1 output.
9 P2.7/TB0.6/ESIC2OUT bidirectional General-purpose digital I/O that also serves as Timer_B TB0 CCR6 capture/compare channel or ESI Comparator 2 output.
10 P5.0/TA1.1/MCLK bidirectional General-purpose digital I/O that also serves as Timer_A TA1 CCR1 capture/compare output or MCLK output.
11 P5.1/TA1.2 bidirectional General-purpose digital I/O that also serves as Timer_A TA1 CCR2 capture/compare output.
12 P5.2/TA1.0/TA1CLK/ACLK bidirectional General-purpose digital I/O that also serves as Timer_A TA1 CCR0 capture/compare output, TA1CLK clock input, or ACLK output.
13 P5.3/UCB1STE bidirectional General-purpose digital I/O that also serves as USCI_B1 slave transmit enable (SPI mode).
14 P3.0/UCB1CLK bidirectional General-purpose digital I/O that also serves as USCI_B1 clock signal (SPI slave input or master output).
15 P3.1/UCB1SIMO/UCB1SDA bidirectional General-purpose digital I/O that also serves as USCI_B1 SIMO (SPI) or SDA (I2C).
16 P3.2/UCB1SOMI/UCB1SCL bidirectional General-purpose digital I/O that also serves as USCI_B1 SOMI (SPI) or SCL (I2C).
17 DVSS1 power_in Digital ground supply; connect to the common system ground.
18 DVCC1 power_in Digital power supply; VCC is 1.8 V to 3.6 V at all DVCC, AVCC and ESIDVCC pins, with 1 µF plus 100 nF low-ESR decoupling placed close to the pin.
19 TEST/SBWTCK input Test mode pin that selects digital I/O on the JTAG pins, and Spy-Bi-Wire input clock; it always has an internal pulldown enabled.
20 RST/NMI/SBWTDIO bidirectional Active-low reset input, nonmaskable interrupt input, or Spy-Bi-Wire data input/output; connect a 47 kΩ pullup or use the internal pullup, with a 2.2 nF (10 nF if JTAG/SBW access is not needed) pulldown.
21 PJ.0/TDO/TB0OUTH/SMCLK/SRSCG1 bidirectional General-purpose digital I/O that also serves as JTAG test data output, Timer_B TB0OUTH high-impedance control, SMCLK output, or low-power debug SCG1 status.
22 PJ.1/TDI/TCLK/MCLK/SRSCG0 bidirectional General-purpose digital I/O that also serves as JTAG test data input or test clock, MCLK output, or low-power debug SCG0 status; leave open when used as JTAG.
23 PJ.2/TMS/ACLK/SROSCOFF bidirectional General-purpose digital I/O that also serves as JTAG test mode select, ACLK output, or low-power debug OSCOFF status; leave open when used as JTAG.
24 PJ.3/TCK/COUT/SRCPUOFF bidirectional General-purpose digital I/O that also serves as JTAG test clock, comparator output, or low-power debug CPUOFF status; leave open when used as JTAG.
25 P3.3/TA1.1/TB0CLK bidirectional General-purpose digital I/O that also serves as Timer_A TA1 CCR1 capture/compare output or Timer_B TB0CLK clock input.
26 P3.4/UCA1SIMO/UCA1TXD/TB0.0 bidirectional General-purpose digital I/O that also serves as USCI_A1 SIMO (SPI) or TXD (UART), or Timer_B TB0 CCR0 capture/compare channel.
27 P3.5/UCA1SOMI/UCA1RXD/TB0.1 bidirectional General-purpose digital I/O that also serves as USCI_A1 SOMI (SPI) or RXD (UART), or Timer_B TB0 CCR1 capture/compare channel.
28 P3.6/UCA1CLK/TB0.2 bidirectional General-purpose digital I/O that also serves as USCI_A1 clock (SPI) or Timer_B TB0 CCR2 capture/compare channel.
29 P3.7/UCA1STE/TB0.3 bidirectional General-purpose digital I/O that also serves as USCI_A1 slave transmit enable (SPI) or Timer_B TB0 CCR3 capture/compare channel.
30 P2.3/UCA0STE/TB0OUTH bidirectional General-purpose digital I/O that also serves as USCI_A0 slave transmit enable (SPI) or Timer_B TB0OUTH high-impedance control for all PWM outputs.
31 P2.2/UCA0CLK/TB0.4/RTCCLK bidirectional General-purpose digital I/O that also serves as USCI_A0 clock (SPI), Timer_B TB0 CCR4 capture/compare channel, or RTC clock output for calibration.
32 P2.1/UCA0SOMI/UCA0RXD/TB0.5/DMAE0 bidirectional General-purpose digital I/O that also serves as USCI_A0 SOMI (SPI) or RXD (UART), BSL receive on the UART BSL variant, Timer_B TB0 CCR5 channel, or DMA external trigger.
33 P2.0/UCA0SIMO/UCA0TXD/TB0.6/TB0CLK bidirectional General-purpose digital I/O that also serves as USCI_A0 SIMO (SPI) or TXD (UART), BSL transmit on the UART BSL variant, Timer_B TB0 CCR6 channel, or TB0CLK clock input.
34 DVSS2 power_in Digital ground supply; connect to the common system ground.
35 DVCC2 power_in Digital power supply; VCC is 1.8 V to 3.6 V at all DVCC, AVCC and ESIDVCC pins, with 1 µF plus 100 nF low-ESR decoupling placed close to the pin.
36 P1.3/ESITEST4/TA1.2/A3/C3 bidirectional General-purpose digital I/O that also serves as ESI test signal 4, Timer_A TA1 CCR2 capture/compare output, ADC analog input A3, or comparator input C3.
37 P1.2/TA1.1/TA0CLK/COUT/A2/C2 bidirectional General-purpose digital I/O that also serves as Timer_A TA1 CCR1 capture/compare output, TA0CLK clock input, comparator output, ADC analog input A2, or comparator input C2.
38 P1.1/TA0.2/TA1CLK/COUT/A1/C1/VREF+/VeREF+ bidirectional General-purpose digital I/O that also serves as Timer_A TA0 CCR2 capture/compare output, TA1CLK clock input, comparator output, ADC analog input A1, comparator input C1, or positive reference voltage output/input.
39 P1.0/TA0.1/DMAE0/RTCCLK/A0/C0/VREF-/VeREF- bidirectional General-purpose digital I/O that also serves as Timer_A TA0 CCR1 capture/compare output, DMA external trigger, RTC clock output, ADC analog input A0, comparator input C0, or negative reference voltage output/input.
40 P9.0/ESICH0/ESITEST0/A8/C8 bidirectional General-purpose digital I/O that also serves as ESI channel 0 sensor excitation output and signal input, ESI test signal 0, ADC analog input A8, or comparator input C8.
41 P9.1/ESICH1/ESITEST1/A9/C9 bidirectional General-purpose digital I/O that also serves as ESI channel 1 sensor excitation output and signal input, ESI test signal 1, ADC analog input A9, or comparator input C9.
42 P9.2/ESICH2/ESITEST2/A10/C10 bidirectional General-purpose digital I/O that also serves as ESI channel 2 sensor excitation output and signal input, ESI test signal 2, ADC analog input A10, or comparator input C10.
43 P9.3/ESICH3/ESITEST3/A11/C11 bidirectional General-purpose digital I/O that also serves as ESI channel 3 sensor excitation output and signal input, ESI test signal 3, ADC analog input A11, or comparator input C11.
44 P9.4/ESICI0/A12/C12 bidirectional General-purpose digital I/O that also serves as ESI channel 0 signal input to comparator, ADC analog input A12, or comparator input C12.
45 P9.5/ESICI1/A13/C13 bidirectional General-purpose digital I/O that also serves as ESI channel 1 signal input to comparator, ADC analog input A13, or comparator input C13.
46 P9.6/ESICI2/A14/C14 bidirectional General-purpose digital I/O that also serves as ESI channel 2 signal input to comparator, ADC analog input A14, or comparator input C14.
47 P9.7/ESICI3/A15/C15 bidirectional General-purpose digital I/O that also serves as ESI channel 3 signal input to comparator, ADC analog input A15, or comparator input C15.
48 ESIDVCC power_in ESI power supply; TI recommends sourcing it from the same supply as DVCC/AVCC with 1 µF plus 100 nF decoupling close to the pin.
49 ESIDVSS power_in ESI ground supply; connect to the common system ground.
50 ESICI input ESI scan interface input to the comparator; leave open when unused.
51 ESICOM passive ESI common termination for scan interface sensors; leave open when unused.
52 AVCC1 power_in Analog power supply; VCC is 1.8 V to 3.6 V at all DVCC, AVCC and ESIDVCC pins, with 1 µF plus 100 nF low-ESR decoupling placed close to the pin.
53 AVSS3 power_in Analog ground supply; connect to the common system ground with a single-point connection to the digital ground.
54 PJ.7/HFXOUT bidirectional General-purpose digital I/O that also serves as the output terminal of the high-frequency crystal oscillator XT2.
55 PJ.6/HFXIN bidirectional General-purpose digital I/O that also serves as the input terminal for the high-frequency crystal oscillator XT2 (or bypass clock input).
56 AVSS1 power_in Analog ground supply; connect to the common system ground.
57 PJ.4/LFXIN bidirectional General-purpose digital I/O that also serves as the input terminal for the low-frequency crystal oscillator XT1 (or bypass clock input).
58 PJ.5/LFXOUT bidirectional General-purpose digital I/O that also serves as the output terminal of the low-frequency crystal oscillator XT1.
59 AVSS2 power_in Analog ground supply; connect to the common system ground.
60 P4.0/UCB1SIMO/UCB1SDA/MCLK bidirectional General-purpose digital I/O that also serves as USCI_B1 SIMO (SPI) or SDA (I2C), or MCLK output.
61 P4.1/UCB1SOMI/UCB1SCL/ACLK bidirectional General-purpose digital I/O that also serves as USCI_B1 SOMI (SPI) or SCL (I2C), or ACLK output.
62 DVSS3 power_in Digital ground supply; connect to the common system ground.
63 DVCC3 power_in Digital power supply; VCC is 1.8 V to 3.6 V at all DVCC, AVCC and ESIDVCC pins, with 1 µF plus 100 nF low-ESR decoupling placed close to the pin.
64 P4.2/UCA0SIMO/UCA0TXD/UCB1CLK bidirectional General-purpose digital I/O that also serves as USCI_A0 SIMO (SPI) or TXD (UART), or USCI_B1 clock signal (SPI).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFP-64(10x10)
Category Single Chip Microcomputer/Microcontroller
Pins 64

CAD (KiCad official)

  • Symbol: MSP430FR5889IPM
  • Footprint: Package_QFP:TQFP-64_10x10mm_P0.5mm
  • 3D model: QFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: msp430fr5889ipm-etched.step / msp430fr5889ipm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430fr5889ipm.step / msp430fr5889ipm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (189 pp, sha256 b0919e7a6373e8f8, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF