MSP430FR58471IRHAR

{
  "slug": "msp430fr58471irhar",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "msp430fr58471irhar",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "msp430fr58471irhar.kicad_sym",
    "msp430fr58471irhar.kicad_mod",
    "msp430fr58471irhar.glb",
    "msp430fr58471irhar.step",
    "msp430fr58471irhar.lbr",
    "docs/hero.png",
    "docs/msp430fr58471irhar-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "msp430fr58471irhar-hero.glb",
    "msp430fr58471irhar-hero.overlay.json"
  ],
  "component": {
    "mpn": "MSP430FR58471IRHAR",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-40-EP(6x6)",
    "pin_count": 41,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://www.ti.com/cn/lit/gpn/msp430fr5858",
    "parts": {
      "symbol": "msp430fr58471irhar.kicad_sym",
      "footprint": "msp430fr58471irhar.kicad_mod",
      "model_3d": "msp430fr58471irhar-hero.glb",
      "model_3d_plain": "msp430fr58471irhar.glb",
      "model_3d_step": "msp430fr58471irhar-etched.step",
      "model_3d_step_plain": "msp430fr58471irhar.step",
      "lbr": "msp430fr58471irhar.lbr"
    },
    "distributor_links": {
      "lcsc": "C2054754",
      "digikey": "MSP430FR58471IRHAR-ND",
      "mouser": "595-P430FR58471IRHAR"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T22:18:02Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "MSP430FR58471IRHAR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-P430FR58471IRHAR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "P1.0/TA0.1/DMAE0/RTCCLK/A0/C0/VREF-/VeREF-",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TA0.1, external DMA trigger, RTC clock output, ADC analog input A0, comparator input C0, and negative reference output/input (VREF-/VeREF-)."
      },
      {
        "number": "2",
        "name": "P1.1/TA0.2/TA1CLK/COUT/A1/C1/VREF+/VeREF+",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TA0.2, TA1 input clock, comparator output, ADC analog input A1, comparator input C1, and positive reference output/input (VREF+/VeREF+)."
      },
      {
        "number": "3",
        "name": "P1.2/TA1.1/TA0CLK/COUT/A2/C2",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TA1.1, TA0 input clock, comparator output, ADC analog input A2, and comparator input C2."
      },
      {
        "number": "4",
        "name": "P3.0/A12/C12",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also ADC analog input A12 and comparator input C12."
      },
      {
        "number": "5",
        "name": "P3.1/A13/C13",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also ADC analog input A13 and comparator input C13."
      },
      {
        "number": "6",
        "name": "P3.2/A14/C14",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also ADC analog input A14 and comparator input C14."
      },
      {
        "number": "7",
        "name": "P3.3/A15/C15",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also ADC analog input A15 and comparator input C15."
      },
      {
        "number": "8",
        "name": "P1.3/TA1.2/UCB0STE/A3/C3",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TA1.2, eUSCI_B0 slave transmit enable in SPI mode, ADC analog input A3, and comparator input C3."
      },
      {
        "number": "9",
        "name": "P1.4/TB0.1/UCA0STE/A4/C4",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0.1, eUSCI_A0 slave transmit enable, ADC analog input A4, and comparator input C4."
      },
      {
        "number": "10",
        "name": "P1.5/TB0.2/UCA0CLK/A5/C5",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0.2, eUSCI_A0 clock (SPI), ADC analog input A5, and comparator input C5."
      },
      {
        "number": "11",
        "name": "PJ.0/TDO/TB0OUTH/SMCLK/SRSCG1/C6",
        "type": "bidirectional",
        "description": "General-purpose digital I/O (PJ.0) shared with JTAG TDO, TB0OUTH, SMCLK output, CPU status bit SCG1, and comparator input C6; direction is controlled by JTAG when JTAG mode is selected."
      },
      {
        "number": "12",
        "name": "PJ.1/TDI/TCLK/MCLK/SRSCG0/C7",
        "type": "bidirectional",
        "description": "General-purpose digital I/O (PJ.1) shared with JTAG TDI/TCLK, MCLK output, CPU status bit SCG0, and comparator input C7; pullups are automatically enabled in JTAG mode."
      },
      {
        "number": "13",
        "name": "PJ.2/TMS/ACLK/SROSCOFF/C8",
        "type": "bidirectional",
        "description": "General-purpose digital I/O (PJ.2) shared with JTAG TMS, ACLK output, CPU status bit OSCOFF, and comparator input C8; pullups are automatically enabled in JTAG mode."
      },
      {
        "number": "14",
        "name": "PJ.3/TCK/SRCPUOFF/C9",
        "type": "bidirectional",
        "description": "General-purpose digital I/O (PJ.3) shared with JTAG TCK, CPU status bit CPUOFF, and comparator input C9; pullups are automatically enabled in JTAG mode."
      },
      {
        "number": "15",
        "name": "P4.0/A8",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also ADC analog input A8."
      },
      {
        "number": "16",
        "name": "P4.1/A9",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also ADC analog input A9."
      },
      {
        "number": "17",
        "name": "P2.5/TB0.0/UCA1TXD/UCA1SIMO",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0.0, eUSCI_A1 transmit (UART) or SIMO (SPI)."
      },
      {
        "number": "18",
        "name": "P2.6/TB0.1/UCA1RXD/UCA1SOMI",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0.1, eUSCI_A1 receive (UART) or SOMI (SPI)."
      },
      {
        "number": "19",
        "name": "TEST/SBWTCK",
        "type": "input",
        "description": "Test mode pin and Spy-Bi-Wire clock input; this pin always has an internal pulldown enabled and should be left open when unused."
      },
      {
        "number": "20",
        "name": "RST/NMI/SBWTDIO",
        "type": "bidirectional",
        "description": "Reset/NMI pin and Spy-Bi-Wire data pin; if unused, connect to DVCC/VCC with a 47-kΩ pullup (or the internal pullup) and a 2.2-nF pulldown (10 nF maximum if JTAG/SBW access is not needed)."
      },
      {
        "number": "21",
        "name": "P2.0/TB0.6/UCA0TXD/UCA0SIMO/TB0CLK/ACLK",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0.6, eUSCI_A0 transmit (UART) or SIMO (SPI), TB0CLK input, and ACLK output; this pin is BSLTX on devices with a UART bootloader."
      },
      {
        "number": "22",
        "name": "P2.1/TB0.0/UCA0RXD/UCA0SOMI/TB0.0",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0.0, eUSCI_A0 receive (UART) or SOMI (SPI); this pin is BSLRX on devices with a UART bootloader."
      },
      {
        "number": "23",
        "name": "P2.2/TB0.2/UCB0CLK",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0.2 and eUSCI_B0 clock (SPI)."
      },
      {
        "number": "24",
        "name": "P3.4/TB0.3/SMCLK",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0.3 and SMCLK output."
      },
      {
        "number": "25",
        "name": "P3.5/TB0.4/COUT",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0.4 and comparator output COUT."
      },
      {
        "number": "26",
        "name": "P3.6/TB0.5",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0.5."
      },
      {
        "number": "27",
        "name": "P3.7/TB0.6",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0.6."
      },
      {
        "number": "28",
        "name": "P1.6/TB0.3/UCB0SIMO/UCB0SDA/TA0.0",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0.3, eUSCI_B0 SIMO (SPI) or I2C data, and TA0.0; this pin is BSLSDA on I2C-bootloader devices."
      },
      {
        "number": "29",
        "name": "P1.7/TB0.4/UCB0SOMI/UCB0SCL/TA1.0",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0.4, eUSCI_B0 SOMI (SPI) or I2C clock, and TA1.0; this pin is BSLSCL on I2C-bootloader devices."
      },
      {
        "number": "30",
        "name": "P4.4/TB0.5",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TB0.5 capture input CCI5B and compare output Out5."
      },
      {
        "number": "31",
        "name": "DVSS",
        "type": "power_in",
        "description": "Digital ground supply; all DVSS and AVSS pins are to be held at 0 V (VSS)."
      },
      {
        "number": "32",
        "name": "DVCC",
        "type": "power_in",
        "description": "Digital power supply; VCC range is 1.8 V to 3.6 V and the voltage difference between DVCC and AVCC must not exceed ±0.3 V."
      },
      {
        "number": "33",
        "name": "P2.7",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5 with no peripheral function on this pin."
      },
      {
        "number": "34",
        "name": "P2.3/TA0.0/UCA1STE/A6/C10",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TA0.0 capture/compare input, eUSCI_A1 slave transmit enable, ADC analog input A6, and comparator input C10."
      },
      {
        "number": "35",
        "name": "P2.4/TA1.0/UCA1CLK/A7/C11",
        "type": "bidirectional",
        "description": "General-purpose digital I/O with port interrupt and wakeup from LPMx.5, also TA1.0 capture/compare input, eUSCI_A1 clock (SPI), ADC analog input A7, and comparator input C11."
      },
      {
        "number": "36",
        "name": "AVSS",
        "type": "power_in",
        "description": "Analog ground supply; all AVSS pins are to be held at 0 V (VSS)."
      },
      {
        "number": "37",
        "name": "PJ.4/LFXIN",
        "type": "bidirectional",
        "description": "General-purpose digital I/O or input for the low-frequency crystal oscillator LFXT (32 kHz) when crystal or bypass mode is selected."
      },
      {
        "number": "38",
        "name": "PJ.5/LFXOUT",
        "type": "bidirectional",
        "description": "General-purpose digital I/O or output of the low-frequency crystal oscillator LFXT when crystal mode is selected."
      },
      {
        "number": "39",
        "name": "AVSS",
        "type": "power_in",
        "description": "Analog ground supply; all AVSS pins are to be held at 0 V (VSS)."
      },
      {
        "number": "40",
        "name": "AVCC",
        "type": "power_in",
        "description": "Analog power supply; VCC range is 1.8 V to 3.6 V and AVCC and DVCC should be powered from the same source."
      },
      {
        "number": "41",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin-to-number mapping comes from the Figure 4-2 40-pin RHA drawing (page 8) for MSP430FR584x/584x1, ; Table 4-1 rows for TEST, RST/NMI/SBWTDIO, P2.0-P2.7, P3.4-P3.7, P4.0, P4.1, P4.4, PJ.0-PJ.3 fall on ; Pin 19 (TEST) and pin 20 (RST) are typed input and bidirectional respectively by inference (SBW data",
          "exposed pad 41 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint",
          "1/41 pins cited to the wrong page (name found elsewhere): ['39:AVSS@p8']"
        ],
        "pages_sent": 56,
        "cost_usd": 0.3212,
        "at": "2026-10-08T22:17:43"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/msp430fr5858",
        "pages": 148,
        "sha256": "a4b924bf37e810af",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 41,
        "described": 41,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "msp430fr58471irhar.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          6.0,
          1.0
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "e5b4286c2329085d9ef7f90d5eb5bf41a435241ecc1baaf1383823b6d6a946ae",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "msp430fr58471irhar-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          6.0,
          1.0
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "8be154076a6c526674f0eaf1527b36ad1f6eb385ad79812b68975c9342af4229",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}