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MSP430FR4132IPMR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430FR4132IPMR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
MSP430FR4132IPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P4.7/R13 | bidirectional | General-purpose I/O or input/output port of the third most positive analog LCD voltage V4 (R13). |
| 2 | P4.6/R23 | bidirectional | General-purpose I/O or input/output port of the second most positive analog LCD voltage V2 (R23). |
| 3 | P4.5/R33 | bidirectional | General-purpose I/O or input/output port of the first most positive analog LCD voltage V1 (R33). |
| 4 | P4.4/LCDCAP1 | bidirectional | General-purpose I/O or LCD charge pump external port connecting to LCDCAP0 by a 0.1-µF capacitor. |
| 5 | P4.3/LCDCAP0 | bidirectional | General-purpose I/O or LCD charge pump external port connecting to LCDCAP1 by a 0.1-µF capacitor. |
| 6 | P4.2/XOUT | bidirectional | General-purpose I/O or output terminal for the crystal oscillator. |
| 7 | P4.1/XIN | bidirectional | General-purpose I/O or input terminal for the crystal oscillator. |
| 8 | DVSS | power_in | Power ground. |
| 9 | DVCC | power_in | Power supply, 1.8 V to 3.6 V, with recommended 4.7 µF to 10 µF plus 0.1 µF decoupling. |
| 10 | RST/NMI/SBWTDIO | bidirectional | Active-low reset input, nonmaskable interrupt input, or Spy-Bi-Wire data input/output. |
| 11 | TEST/SBWTCK | input | Test mode pin selecting digital I/O on JTAG pins, or Spy-Bi-Wire input clock; has an internal pulldown always enabled. |
| 12 | P4.0/TA1.1 | bidirectional | General-purpose I/O or Timer TA1 CCR1 capture input CCI1A / compare output Out1. |
| 13 | P8.3/TA1.2 | bidirectional | General-purpose I/O or Timer TA1 CCR2 capture input CCI2A / compare output Out2. |
| 14 | P8.2/TA1CLK | bidirectional | General-purpose I/O or timer clock input TACLK for TA1. |
| 15 | P8.1/ACLK/A9 | bidirectional | General-purpose I/O, ACLK output, or ADC analog input A9. |
| 16 | P8.0/SMCLK/A8 | bidirectional | General-purpose I/O, SMCLK output, or ADC analog input A8. |
| 17 | P1.7/TA0.1/TDO/A7 | bidirectional | General-purpose I/O, Timer TA0 CCR1 capture/compare, JTAG test data output, or analog input A7. |
| 18 | P1.6/TA0.2/TDI/TCLK/A6 | bidirectional | General-purpose I/O, Timer TA0 CCR2 capture/compare, JTAG test data input or test clock input, or analog input A6. |
| 19 | P1.5/TA0CLK/TMS/A5 | bidirectional | General-purpose I/O, timer clock input TACLK for TA0, JTAG test mode select, or analog input A5. |
| 20 | P1.4/MCLK/TCK/A4/VREF+ | bidirectional | General-purpose I/O, MCLK output, JTAG test clock, analog input A4, or positive reference voltage output with ground as reference. |
| 21 | P1.3/UCA0STE/A3 | bidirectional | General-purpose I/O, eUSCI_A0 SPI slave transmit enable, or analog input A3. |
| 22 | P1.2/UCA0CLK/A2 | bidirectional | General-purpose I/O, eUSCI_A0 clock, or analog input A2. |
| 23 | P1.1/UCA0RXD/UCA0SOMI/A1/Veref+ | bidirectional | General-purpose I/O, eUSCI_A0 UART RXD / SPI SOMI, analog input A1, or Veref+. |
| 24 | P1.0/UCA0TXD/UCA0SIMO/A0/Veref- | bidirectional | General-purpose I/O, eUSCI_A0 UART TXD / SPI SIMO, analog input A0, or Veref-. |
| 25 | P5.7/L39 | bidirectional | General-purpose I/O or LCD drive pin L39, either segment or common output. |
| 26 | P5.6/L38 | bidirectional | General-purpose I/O or LCD drive pin L38, either segment or common output. |
| 27 | P5.5/L37 | bidirectional | General-purpose I/O or LCD drive pin L37, either segment or common output. |
| 28 | P5.4/L36 | bidirectional | General-purpose I/O or LCD drive pin L36, either segment or common output. |
| 29 | P5.3/UCB0SOMI/UCB0SCL/L35 | bidirectional | General-purpose I/O, eUSCI_B0 SPI SOMI / I2C SCL, or LCD drive pin L35. |
| 30 | P5.2/UCB0SIMO/UCB0SDA/L34 | bidirectional | General-purpose I/O, eUSCI_B0 SPI SIMO / I2C SDA, or LCD drive pin L34. |
| 31 | P5.1/UCB0CLK/L33 | bidirectional | General-purpose I/O, eUSCI_B0 clock, or LCD drive pin L33. |
| 32 | P5.0/UCB0STE/L32 | bidirectional | General-purpose I/O, eUSCI_B0 slave transmit enable, or LCD drive pin L32. |
| 33 | P2.7/L31 | bidirectional | General-purpose I/O with interrupt/wakeup capability or LCD drive pin L31. |
| 34 | P2.6/L30 | bidirectional | General-purpose I/O with interrupt/wakeup capability or LCD drive pin L30. |
| 35 | P2.5/L29 | bidirectional | General-purpose I/O with interrupt/wakeup capability or LCD drive pin L29. |
| 36 | P2.4/L28 | bidirectional | General-purpose I/O with interrupt/wakeup capability or LCD drive pin L28. |
| 37 | P2.3/L27 | bidirectional | General-purpose I/O with interrupt/wakeup capability or LCD drive pin L27. |
| 38 | P2.2/L26 | bidirectional | General-purpose I/O with interrupt/wakeup capability or LCD drive pin L26. |
| 39 | P2.1/L25 | bidirectional | General-purpose I/O with interrupt/wakeup capability or LCD drive pin L25. |
| 40 | P2.0/L24 | bidirectional | General-purpose I/O with interrupt/wakeup capability or LCD drive pin L24. |
| 41 | P6.7/L23 | bidirectional | General-purpose I/O or LCD drive pin L23, either segment or common output. |
| 42 | P6.6/L22 | bidirectional | General-purpose I/O or LCD drive pin L22, either segment or common output. |
| 43 | P6.5/L21 | bidirectional | General-purpose I/O or LCD drive pin L21, either segment or common output. |
| 44 | P6.4/L20 | bidirectional | General-purpose I/O or LCD drive pin L20, either segment or common output. |
| 45 | P6.3/L19 | bidirectional | General-purpose I/O or LCD drive pin L19, either segment or common output. |
| 46 | P6.2/L18 | bidirectional | General-purpose I/O or LCD drive pin L18, either segment or common output. |
| 47 | P6.1/L17 | bidirectional | General-purpose I/O or LCD drive pin L17, either segment or common output. |
| 48 | P6.0/L16 | bidirectional | General-purpose I/O or LCD drive pin L16, either segment or common output. |
| 49 | P3.7/L15 | bidirectional | General-purpose I/O or LCD drive pin L15, either segment or common output. |
| 50 | P3.6/L14 | bidirectional | General-purpose I/O or LCD drive pin L14, either segment or common output. |
| 51 | P3.5/L13 | bidirectional | General-purpose I/O or LCD drive pin L13, either segment or common output. |
| 52 | P3.4/L12 | bidirectional | General-purpose I/O or LCD drive pin L12, either segment or common output. |
| 53 | P3.3/L11 | bidirectional | General-purpose I/O or LCD drive pin L11, either segment or common output. |
| 54 | P3.2/L10 | bidirectional | General-purpose I/O or LCD drive pin L10, either segment or common output. |
| 55 | P3.1/L9 | bidirectional | General-purpose I/O or LCD drive pin L9, either segment or common output. |
| 56 | P3.0/L8 | bidirectional | General-purpose I/O or LCD drive pin L8, either segment or common output. |
| 57 | P7.7/L7 | bidirectional | General-purpose I/O or LCD drive pin L7, either segment or common output; not bonded out in smaller packages and must be initialized by software after reset for lowest leakage. |
| 58 | P7.6/L6 | bidirectional | General-purpose I/O or LCD drive pin L6, either segment or common output; not bonded out in smaller packages and must be initialized by software after reset for lowest leakage. |
| 59 | P7.5/L5 | bidirectional | General-purpose I/O or LCD drive pin L5, either segment or common output; not bonded out in all smaller packages. |
| 60 | P7.4/L4 | bidirectional | General-purpose I/O or LCD drive pin L4, either segment or common output; not bonded out in all smaller packages. |
| 61 | P7.3/L3 | bidirectional | General-purpose I/O or LCD drive pin L3, either segment or common output. |
| 62 | P7.2/L2 | bidirectional | General-purpose I/O or LCD drive pin L2, either segment or common output. |
| 63 | P7.1/L1 | bidirectional | General-purpose I/O or LCD drive pin L1, either segment or common output. |
| 64 | P7.0/L0 | bidirectional | General-purpose I/O or LCD drive pin L0, either segment or common output. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
MSP430FR4132IPMR - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
msp430fr4132ipmr-etched.step/msp430fr4132ipmr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430fr4132ipmr.step/msp430fr4132ipmr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (110 pp, sha256
47c6ce82c3083c42, retrieved 2026-10-01, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).