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MSP430FR4131IPMR

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Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MSP430FR4131IPMR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

MSP430FR4131IPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P4.7/R13 bidirectional General-purpose I/O, also the input/output for the third most positive analog LCD voltage V4 (R13).
2 P4.6/R23 bidirectional General-purpose I/O, also the input/output for the second most positive analog LCD voltage V2 (R23).
3 P4.5/R33 bidirectional General-purpose I/O, also the input/output for the first most positive analog LCD voltage V1 (R33).
4 P4.4/LCDCAP1 bidirectional General-purpose I/O, also the LCD charge pump external port connected to LCDCAP0 by a 0.1-µF capacitor.
5 P4.3/LCDCAP0 bidirectional General-purpose I/O, also the LCD charge pump external port connected to LCDCAP1 by a 0.1-µF capacitor.
6 P4.2/XOUT bidirectional General-purpose I/O, also the output terminal for the 32-kHz crystal oscillator.
7 P4.1/XIN bidirectional General-purpose I/O, also the input terminal for the crystal oscillator; only a low-frequency (32 kHz) crystal is supported.
8 DVSS power_in Power ground (0 V supply reference, VSS).
9 DVCC power_in Power supply: 1.8 V to 3.6 V at DVCC, with a recommended 4.7 µF to 10 µF capacitor at DVCC.
10 RST/NMI/SBWTDIO bidirectional Active-low reset input, nonmaskable interrupt input, and Spy-Bi-Wire data input/output.
11 TEST/SBWTCK input Test mode pin, selected digital I/O on JTAG pins, and Spy-Bi-Wire input clock; it always has an internal pulldown enabled.
12 P4.0/TA1.1 bidirectional General-purpose I/O, also Timer TA1 CCR1 capture input CCI1A or compare output Out1 (TA1.1).
13 P8.3/TA1.2 bidirectional General-purpose I/O, also Timer TA1 CCR2 capture input CCI2A or compare output Out2 (TA1.2).
14 P8.2/TA1CLK bidirectional General-purpose I/O, also the timer clock input TACLK for TA1.
15 P8.1/ACLK/A9 bidirectional General-purpose I/O, also ACLK output and ADC analog input A9 (pin available only in the LQFP-64 package).
16 P8.0/SMCLK/A8 bidirectional General-purpose I/O, also SMCLK output and ADC analog input A8 (pin available only in the LQFP-64 package).
17 P1.7/TA0.1/TDO/A7 bidirectional General-purpose I/O, also Timer TA0 CCR1 capture/compare (TA0.1), JTAG test data output TDO, and ADC analog input A7; disable the pin interrupt during JTAG debug.
18 P1.6/TA0.2/TDI/TCLK/A6 bidirectional General-purpose I/O, also Timer TA0 CCR2 (TA0.2), JTAG test data input or test clock TDI/TCLK, and ADC analog input A6; disable the pin interrupt during JTAG debug.
19 P1.5/TA0CLK/TMS/A5 bidirectional General-purpose I/O, also the timer clock input TACLK for TA0, JTAG test mode select TMS, and ADC analog input A5.
20 P1.4/MCLK/TCK/A4/VREF+ bidirectional General-purpose I/O, also MCLK output, JTAG test clock TCK, ADC analog input A4, and positive reference voltage output VREF+ referenced to ground.
21 P1.3/UCA0STE/A3 bidirectional General-purpose I/O, also eUSCI_A0 SPI slave transmit enable (UCA0STE) and ADC analog input A3.
22 P1.2/UCA0CLK/A2 bidirectional General-purpose I/O, also eUSCI_A0 clock (UCA0CLK) and ADC analog input A2.
23 P1.1/UCA0RXD/UCA0SOMI/A1/Veref+ bidirectional General-purpose I/O, also eUSCI_A0 UART receive or SPI SOMI (UCA0RXD/UCA0SOMI), ADC analog input A1, and ADC positive reference Veref+.
24 P1.0/UCA0TXD/UCA0SIMO/A0/Veref- bidirectional General-purpose I/O, also eUSCI_A0 UART transmit or SPI SIMO (UCA0TXD/UCA0SIMO), ADC analog input A0, and ADC negative reference Veref-.
25 P5.7/L39 bidirectional General-purpose I/O, also LCD drive pin L39 (segment or common output).
26 P5.6/L38 bidirectional General-purpose I/O, also LCD drive pin L38 (segment or common output).
27 P5.5/L37 bidirectional General-purpose I/O, also LCD drive pin L37 (segment or common output).
28 P5.4/L36 bidirectional General-purpose I/O, also LCD drive pin L36 (segment or common output).
29 P5.3/UCB0SOMI/UCB0SCL/L35 bidirectional General-purpose I/O, also eUSCI_B0 SPI SOMI or I2C SCL, and LCD drive pin L35.
30 P5.2/UCB0SIMO/UCB0SDA/L34 bidirectional General-purpose I/O, also eUSCI_B0 SPI SIMO or I2C SDA, and LCD drive pin L34.
31 P5.1/UCB0CLK/L33 bidirectional General-purpose I/O, also eUSCI_B0 clock (UCB0CLK) and LCD drive pin L33.
32 P5.0/UCB0STE/L32 bidirectional General-purpose I/O, also eUSCI_B0 slave transmit enable (UCB0STE) and LCD drive pin L32.
33 P2.7/L31 bidirectional General-purpose I/O with interrupt capability, also LCD drive pin L31 (segment or common output).
34 P2.6/L30 bidirectional General-purpose I/O with interrupt capability, also LCD drive pin L30 (segment or common output).
35 P2.5/L29 bidirectional General-purpose I/O with interrupt capability, also LCD drive pin L29 (segment or common output).
36 P2.4/L28 bidirectional General-purpose I/O with interrupt capability, also LCD drive pin L28 (segment or common output).
37 P2.3/L27 bidirectional General-purpose I/O with interrupt capability, also LCD drive pin L27 (segment or common output).
38 P2.2/L26 bidirectional General-purpose I/O with interrupt capability, also LCD drive pin L26 (segment or common output).
39 P2.1/L25 bidirectional General-purpose I/O with interrupt capability, also LCD drive pin L25 (segment or common output).
40 P2.0/L24 bidirectional General-purpose I/O with interrupt capability, also LCD drive pin L24 (segment or common output).
41 P6.7/L23 bidirectional General-purpose I/O, also LCD drive pin L23 (segment or common output).
42 P6.6/L22 bidirectional General-purpose I/O, also LCD drive pin L22 (segment or common output).
43 P6.5/L21 bidirectional General-purpose I/O, also LCD drive pin L21 (segment or common output).
44 P6.4/L20 bidirectional General-purpose I/O, also LCD drive pin L20 (segment or common output).
45 P6.3/L19 bidirectional General-purpose I/O, also LCD drive pin L19 (segment or common output).
46 P6.2/L18 bidirectional General-purpose I/O, also LCD drive pin L18 (segment or common output).
47 P6.1/L17 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output.
48 P6.0/L16 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output.
49 P3.7/L15 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output.
50 P3.6/L14 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output.
51 P3.5/L13 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output.
52 P3.4/L12 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output.
53 P3.3/L11 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output.
54 P3.2/L10 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output.
55 P3.1/L9 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output.
56 P3.0/L8 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output.
57 P7.7/L7 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output. Not bonded out in smaller packages, so initialize by software after reset for lowest leakage.
58 P7.6/L6 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output. Not bonded out in smaller packages, so initialize by software after reset for lowest leakage.
59 P7.5/L5 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output. Not bonded out in smaller packages, so initialize by software after reset for lowest leakage.
60 P7.4/L4 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output. Not bonded out in smaller packages, so initialize by software after reset for lowest leakage.
61 P7.3/L3 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output.
62 P7.2/L2 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output.
63 P7.1/L1 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output.
64 P7.0/L0 bidirectional General-purpose I/O, also LCD drive pin; either segment or common output.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: MSP430FR4131IPMR
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: msp430fr4131ipmr-etched.step / msp430fr4131ipmr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430fr4131ipmr.step / msp430fr4131ipmr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (110 pp, sha256 47c6ce82c3083c42, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF