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MSP430FR2475TPTR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430FR2475TPTR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
MSP430FR2475TPTR from Texas Instruments, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Digital supply voltage (1.8 V to 3.6 V) |
| 2 | RST/NMI/SBWTDIO | bidirectional | Reset input with pullup, NMI input, or Spy-Bi-Wire data input/output |
| 3 | TEST/SBWTCK | input | Test mode pin with internal pulldown, or Spy-Bi-Wire clock input |
| 4 | P1.4/UCA0TXD/UCA0SIMO/TA1.2/TCK/A4/VREF+ | bidirectional | General-purpose I/O with port interrupt; UART transmit or SPI transmit; Timer TA1 CCR2; JTAG TCK; ADC input A4; or ADC positive reference voltage output |
| 5 | P1.5/UCA0RXD/UCA0SOMI/TA1.1/TMS/A5 | bidirectional | General-purpose I/O with port interrupt; UART receive or SPI receive; Timer TA1 CCR1; JTAG TMS; ADC input A5 |
| 6 | P1.6/UCA0CLK/TA1CLK/TDI/TCLK/A6 | bidirectional | General-purpose I/O with port interrupt; UART clock; Timer TA1 clock input; JTAG TDI/TCLK; ADC input A6 |
| 7 | P1.7/UCA0STE/SMCLK/TDO/A7 | bidirectional | General-purpose I/O with port interrupt; UART chip select; SMCLK output; JTAG TDO; ADC input A7 |
| 8 | P4.3/UCB1SOMI/UCB1SCL/TB0.5/A8 | bidirectional | General-purpose I/O; I2C/SPI data or clock; Timer TB0 CCR5; ADC input A8 |
| 9 | P4.4/UCB1SIMO/UCB1SDA/TB0.6/A9 | bidirectional | General-purpose I/O; I2C/SPI data or clock; Timer TB0 CCR6; ADC input A9 |
| 10 | P5.3/UCB1CLK/TA3.0/A10 | bidirectional | General-purpose I/O; I2C/SPI clock; Timer TA3 CCR0 (remapped); ADC input A10 |
| 11 | P5.4/UCB1STE/TA3CLK/A11 | bidirectional | General-purpose I/O; I2C/SPI chip select; Timer TA3 clock input (remapped); ADC input A11 |
| 12 | P1.0/UCB0STE/TA0CLK/A0/Veref+ | bidirectional | General-purpose I/O with port interrupt; I2C/SPI chip select; Timer TA0 clock input; ADC input A0; or ADC positive reference voltage input/output |
| 13 | P1.1/UCB0CLK/TA0.1/COMP0.0/A1 | bidirectional | General-purpose I/O with port interrupt; I2C/SPI clock; Timer TA0 CCR1; Comparator input; ADC input A1 |
| 14 | P1.2/UCB0SIMO/UCB0SDA/TA0.2/A2/Veref- | bidirectional | General-purpose I/O with port interrupt; I2C/SPI data; Timer TA0 CCR2; ADC input A2; or ADC negative reference voltage input |
| 15 | P1.3/UCB0SOMI/UCB0SCL/MCLK/A3 | bidirectional | General-purpose I/O with port interrupt; I2C/SPI data; MCLK output; ADC input A3 |
| 16 | P2.2/ACLK/COMP0.1 | bidirectional | General-purpose I/O; ACLK output; Comparator input channel C1 |
| 17 | P4.5/UCB0SOMI/UCB0SCL/TA3.2 | bidirectional | General-purpose I/O; I2C/SPI data or clock (remapped); Timer TA3 CCR2 (remapped) |
| 18 | P4.6/UCB0SIMO/UCB0SDA/TA3.1 | bidirectional | General-purpose I/O; I2C/SPI data or clock (remapped); Timer TA3 CCR1 (remapped) |
| 19 | P5.5/UCB0CLK/TA2CLK | bidirectional | General-purpose I/O; I2C/SPI clock (remapped); Timer TA2 clock input (remapped) |
| 20 | P5.6/UCB0STE/TA2.0 | bidirectional | General-purpose I/O; I2C/SPI chip select (remapped); Timer TA2 CCR0 (remapped) |
| 21 | P5.7/TA2.1/COMP0.2 | bidirectional | General-purpose I/O; Timer TA2 CCR1 (remapped); Comparator input channel C2 |
| 22 | P6.0/TA2.2/COMP0.3 | bidirectional | General-purpose I/O; Timer TA2 CCR2 (remapped); Comparator input channel C3 |
| 23 | P3.0/TA2.2 | bidirectional | General-purpose I/O; Timer TA2 CCR2 output |
| 24 | P3.3/TA2.1 | bidirectional | General-purpose I/O; Timer TA2 CCR1 output |
| 25 | P2.3/TA2.0 | bidirectional | General-purpose I/O; Timer TA2 CCR0 output |
| 26 | P3.4/TA2CLK/COMP0OUT | bidirectional | General-purpose I/O; Timer TA2 clock input; Comparator output channel COUT |
| 27 | P3.1/UCA1STE | bidirectional | General-purpose I/O; UART/SPI chip select for eUSCI_A1 |
| 28 | P2.4/UCA1CLK | bidirectional | General-purpose I/O; UART/SPI clock for eUSCI_A1 |
| 29 | P2.5/UCA1RXD/UCA1SOMI | bidirectional | General-purpose I/O; UART receive data or SPI receive data for eUSCI_A1 |
| 30 | P2.6/UCA1TXD/UCA1SIMO | bidirectional | General-purpose I/O; UART transmit data or SPI transmit data for eUSCI_A1 |
| 31 | DNC | unconnected | Do not connect |
| 32 | P3.7/TA3.2 | bidirectional | General-purpose I/O; Timer TA3 CCR2 output |
| 33 | P4.0/TA3.1 | bidirectional | General-purpose I/O; Timer TA3 CCR1 output |
| 34 | P4.1/TA3.0 | bidirectional | General-purpose I/O; Timer TA3 CCR0 output |
| 35 | P4.2/TA3CLK | bidirectional | General-purpose I/O; Timer TA3 clock input |
| 36 | P2.7/UCB1STE | bidirectional | General-purpose I/O; I2C/SPI chip select for eUSCI_B1 |
| 37 | P3.5/UCB1CLK/TB0TRG | bidirectional | General-purpose I/O; I2C/SPI clock for eUSCI_B1; Timer TB0 trigger input |
| 38 | P3.2/UCB1SIMO/UCB1SDA | bidirectional | General-purpose I/O; I2C data or SPI transmit data for eUSCI_B1 |
| 39 | P3.6/UCB1SOMI/UCB1SCL | bidirectional | General-purpose I/O; I2C clock or SPI receive data for eUSCI_B1 |
| 40 | P6.1/TB0CLK | bidirectional | General-purpose I/O; Timer TB0 clock input |
| 41 | P6.2/TB0.0 | bidirectional | General-purpose I/O; Timer TB0 CCR0 output |
| 42 | P4.7/UCA0STE/TB0.1 | bidirectional | General-purpose I/O; UART/SPI chip select for eUSCI_A0 (remapped); Timer TB0 CCR1 output |
| 43 | P5.0/UCA0CLK/TB0.2 | bidirectional | General-purpose I/O; UART/SPI clock for eUSCI_A0 (remapped); Timer TB0 CCR2 input |
| 44 | P5.1/UCA0RXD/UCA0SOMI/TB0.3 | bidirectional | General-purpose I/O; UART receive data or SPI receive data for eUSCI_A0 (remapped); Timer TB0 CCR3 output |
| 45 | P5.2/UCA0TXD/UCA0SIMO/TB0.4 | bidirectional | General-purpose I/O; UART transmit data or SPI transmit data for eUSCI_A0 (remapped); Timer TB0 CCR4 output |
| 46 | P2.0/XOUT | bidirectional | General-purpose I/O; Crystal oscillator output terminal |
| 47 | P2.1/XIN | bidirectional | General-purpose I/O; Crystal oscillator input terminal |
| 48 | DVSS | power_in | Digital supply voltage ground |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
MSP430FR2475TPTR - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
msp430fr2475tptr-etched.step/msp430fr2475tptr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430fr2475tptr.step/msp430fr2475tptr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (119 pp, sha256
c5ddbe428514a331, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).