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MSP430FR2155TRHAR

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Texas Instruments Microcontrollers (MCU/MPU/SOC), QFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MSP430FR2155TRHAR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · QFN-40-EP(6x6)

MSP430FR2155TRHAR from Texas Instruments, in a QFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P1.1/UCB0CLK/ACLK/COMP0.1/A1 bidirectional General-purpose I/O P1.1 with LVCMOS buffer powered from DVCC and reset state OFF; alternate functions are eUSCI_B0 clock, ACLK output, eCOMP0 input COMP0.1 and ADC analog input A1.
2 P1.0/UCB0STE/SMCLK/COMP0.0/A0/Veref+ bidirectional General-purpose I/O P1.0 with LVCMOS buffer powered from DVCC and reset state OFF; alternate functions are eUSCI_B0 STE, SMCLK output, eCOMP0 input COMP0.0, ADC analog input A0 and ADC positive reference Veref+.
3 TEST/SBWTCK input TEST pin selects test/JTAG-related operation and carries the Spy-Bi-Wire clock SBWTCK; it always has an internal pulldown enabled, so it may be left open.
4 RST/NMI/SBWTDIO bidirectional Device reset pin (RST, reset default function) that can alternatively be configured as non-maskable interrupt NMI or Spy-Bi-Wire data I/O SBWTDIO; if unused, use a 47-kΩ pullup or the internal pullup with a 10-nF (or 1.1-nF) pulldown.
5 DVCC power_in Primary power supply pin for the digital and analog modules, specified from 1.8 V to 3.6 V, with 4.7 µF to 10 µF recommended capacitance at DVCC.
6 DVSS power_in Ground (VSS) supply pin for the digital and analog modules; the exposed thermal pad must also be connected to VSS.
7 P2.7/TB0CLK/XIN bidirectional General-purpose I/O P2.7 with LVCMOS buffer; alternate functions are Timer_B0 clock input TB0CLK and input terminal XIN for the crystal oscillator.
8 P2.6/MCLK/XOUT bidirectional General-purpose I/O P2.6 with LVCMOS buffer; alternate functions are MCLK output and output terminal XOUT for the crystal oscillator.
9 P2.5/COMP1.0 bidirectional General-purpose I/O P2.5 with LVCMOS buffer; alternate function is eCOMP1 comparator input COMP1.0.
10 P2.4/COMP1.1 bidirectional General-purpose I/O P2.4 with LVCMOS buffer; alternate function is eCOMP1 comparator input COMP1.1.
11 P4.7/UCB1SOMI/UCB1SCL bidirectional General-purpose I/O P4.7 with LVCMOS buffer; alternate functions are eUSCI_B1 SOMI in SPI mode or SCL in I2C mode.
12 P4.6/UCB1SIMO/UCB1SDA bidirectional General-purpose I/O P4.6 with LVCMOS buffer; alternate functions are eUSCI_B1 SIMO in SPI mode or SDA in I2C mode.
13 P4.5/UCB1CLK bidirectional General-purpose I/O P4.5 with LVCMOS buffer; alternate function is eUSCI_B1 clock UCB1CLK.
14 P4.4/UCB1STE bidirectional General-purpose I/O P4.4 with LVCMOS buffer; alternate function is eUSCI_B1 STE.
15 P6.1/TB3.2 bidirectional General-purpose I/O P6.1 with LVCMOS buffer; alternate function is Timer_B3 capture/compare channel TB3.2.
16 P6.0/TB3.1 bidirectional General-purpose I/O P6.0 with LVCMOS buffer; alternate function is Timer_B3 capture/compare channel TB3.1.
17 P4.3/UCA1TXD/UCA1SIMO bidirectional General-purpose I/O P4.3 with LVCMOS buffer; alternate functions are eUSCI_A1 TXD in UART mode or SIMO in SPI mode.
18 P4.2/UCA1RXD/UCA1SOMI bidirectional General-purpose I/O P4.2 with LVCMOS buffer; alternate functions are eUSCI_A1 RXD in UART mode or SOMI in SPI mode.
19 P4.1/UCA1CLK bidirectional General-purpose I/O P4.1 with LVCMOS buffer; alternate function is eUSCI_A1 clock UCA1CLK.
20 P4.0/UCA1STE/ISOTXD/ISORXD bidirectional General-purpose I/O P4.0 with LVCMOS buffer; alternate functions are eUSCI_A1 STE, ISOTXD output and ISORXD input.
21 P2.3/TB1TRG bidirectional General-purpose I/O P2.3 with LVCMOS buffer; alternate function is Timer_B1 external trigger TB1TRG.
22 P2.2/TB1CLK bidirectional General-purpose I/O P2.2 with LVCMOS buffer; alternate function is Timer_B1 clock input TB1CLK.
23 P2.1/TB1.2/COMP1.O bidirectional General-purpose I/O P2.1 with LVCMOS buffer; alternate functions are Timer_B1 channel TB1.2 and eCOMP1 output COMP1.O.
24 P2.0/TB1.1/COMP0.O bidirectional General-purpose I/O P2.0 with LVCMOS buffer; alternate functions are Timer_B1 channel TB1.1 and eCOMP0 output COMP0.O.
25 P1.7/UCA0TXD/UCA0SIMO/TB0.2/TDO/A7/VREF+ bidirectional General-purpose I/O P1.7 with LVCMOS buffer; alternate functions are eUSCI_A0 TXD/SIMO, Timer_B0 channel TB0.2, JTAG TDO, ADC analog input A7 and VREF+.
26 P1.6/UCA0RXD/UCA0SOMI/TB0.1/TDI/TCLK/A6 bidirectional General-purpose I/O P1.6 with LVCMOS buffer; alternate functions are eUSCI_A0 RXD/SOMI, Timer_B0 channel TB0.1, JTAG TDI/TCLK and ADC analog input A6.
27 P1.5/UCA0CLK/TMS/A5 bidirectional General-purpose I/O P1.5 with LVCMOS buffer; alternate functions are eUSCI_A0 clock, JTAG TMS and ADC analog input A5.
28 P1.4/UCA0STE/TCK/A4 bidirectional General-purpose I/O P1.4 with LVCMOS buffer; alternate functions are eUSCI_A0 STE, JTAG TCK and ADC analog input A4.
29 P3.7 bidirectional General-purpose I/O P3.7 with LVCMOS buffer; the OA3+ analog function listed for MSP430FR235x is not available on MSP430FR215x, which has no SAC modules.
30 P3.6 bidirectional General-purpose I/O P3.6 with LVCMOS buffer; the OA3- analog function listed for MSP430FR235x is not available on MSP430FR215x.
31 P3.5 bidirectional General-purpose I/O P3.5 with LVCMOS buffer; the OA3O analog function listed for MSP430FR235x is not available on MSP430FR215x.
32 P3.4/SMCLK bidirectional General-purpose I/O P3.4 with LVCMOS buffer; alternate function is SMCLK output.
33 P5.1/TB2.2/MFM.TX/A9 bidirectional General-purpose I/O P5.1 with LVCMOS buffer; alternate functions are Timer_B2 channel TB2.2, Manchester function module transmit MFM.TX and ADC analog input A9.
34 P5.0/TB2.1/MFM.RX/A8 bidirectional General-purpose I/O P5.0 with LVCMOS buffer; alternate functions are Timer_B2 channel TB2.1, Manchester function module receive MFM.RX and ADC analog input A8.
35 P3.3 bidirectional General-purpose I/O P3.3 with LVCMOS buffer; the OA2+ analog function listed for MSP430FR235x is not available on MSP430FR215x.
36 P3.2 bidirectional General-purpose I/O P3.2 with LVCMOS buffer; the OA2- analog function listed for MSP430FR235x is not available on MSP430FR215x.
37 P3.1 bidirectional General-purpose I/O P3.1 with LVCMOS buffer; the OA2O analog function listed for MSP430FR235x is not available on MSP430FR215x.
38 P3.0/MCLK bidirectional General-purpose I/O P3.0 with LVCMOS buffer; alternate function is MCLK output.
39 P1.3/UCB0SOMI/UCB0SCL/A3 bidirectional General-purpose I/O P1.3 with LVCMOS buffer; alternate functions are eUSCI_B0 SOMI in SPI mode or SCL in I2C mode and ADC analog input A3.
40 P1.2/UCB0SIMO/UCB0SDA/TB0TRG/A2/Veref- bidirectional General-purpose I/O P1.2 with LVCMOS buffer; alternate functions are eUSCI_B0 SIMO in SPI mode or SDA in I2C mode, Timer_B0 trigger TB0TRG, ADC analog input A2 and ADC negative reference Veref-.
41 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-40-EP(6x6)
Category Embedded Processors & Controllers
Pins 41

CAD (KiCad official)

  • Symbol: MSP430FR2155TRHAR
  • Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
  • 3D model: QFN-40-EP(6x6) (KiCad packages3D, STEP)
  • 3D model files: msp430fr2155trhar-etched.step / msp430fr2155trhar-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430fr2155trhar.step / msp430fr2155trhar.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (152 pp, sha256 f1ebe8a259a8e556, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF