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MSP430FG4618IPZR
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Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+136@@ -0,0 +1,136 @@+# MSP430FG4618IPZR++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)++MSP430FG4618IPZR from Texas Instruments, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DVCC1 | power_in | Digital supply voltage, positive terminal. |+| 2 | P6.3/A3/OA1O | bidirectional | General-purpose digital I/O, with analog input A3 to the 12-bit ADC and the OA1 output. |+| 3 | P6.4/A4/OA1I0 | bidirectional | General-purpose digital I/O, with analog input A4 to the 12-bit ADC and the OA1 input multiplexer on the + and − terminals. |+| 4 | P6.5/A5/OA2O | bidirectional | General-purpose digital I/O, with analog input A5 to the 12-bit ADC and the OA2 output. |+| 5 | P6.6/A6/DAC0/OA2I0 | bidirectional | General-purpose digital I/O, with analog input A6 to the 12-bit ADC, DAC12.0 output, and the OA2 input multiplexer on the + and − terminals. |+| 6 | P6.7/A7/DAC1/SVSIN | bidirectional | General-purpose digital I/O, with analog input A7 to the 12-bit ADC, DAC12.1 output, and analog input to the brownout/supply voltage supervisor. |+| 7 | VREF+ | power_in | Output of the positive terminal of the reference voltage in the ADC. |+| 8 | XIN | input | Input port for crystal oscillator XT1; standard or watch crystals can be connected. |+| 9 | XOUT | output | Output terminal of crystal oscillator XT1. |+| 10 | VeREF+/DAC0 | bidirectional | Input for an external reference voltage to the ADC, or the DAC12.0 output. |+| 11 | VREF−/VeREF− | power_in | Negative terminal for the ADC reference voltage, either the internal reference or an externally applied reference voltage. |+| 12 | P5.1/S0/A12/DAC1 | bidirectional | General-purpose digital I/O, LCD segment output S0, analog input A12 to the ADC, and DAC12.1 output; segments S0-S3 are disabled when the LCD charge pump is enabled. |+| 13 | P5.0/S1/A13/OA1I1 | bidirectional | General-purpose digital I/O, LCD segment output S1, analog input A13 to the ADC, and the OA1 input multiplexer; S1 is disabled when the LCD charge pump is enabled. |+| 14 | P10.7/S2/A14/OA2I1 | bidirectional | General-purpose digital I/O, LCD segment output S2, analog input A14 to the ADC, and the OA2 input multiplexer; S2 is disabled when the LCD charge pump is enabled. |+| 15 | P10.6/S3/A15 | bidirectional | General-purpose digital I/O, LCD segment output S3, and analog input A15 to the ADC; S3 is disabled when the LCD charge pump is enabled. |+| 16 | P10.5/S4 | bidirectional | General-purpose digital I/O and LCD segment output S4. |+| 17 | P10.4/S5 | bidirectional | General-purpose digital I/O and LCD segment output S5. |+| 18 | P10.3/S6 | bidirectional | General-purpose digital I/O and LCD segment output S6. |+| 19 | P10.2/S7 | bidirectional | General-purpose digital I/O and LCD segment output S7. |+| 20 | P10.1/S8 | bidirectional | General-purpose digital I/O and LCD segment output S8. |+| 21 | P10.0/S9 | bidirectional | General-purpose digital I/O and LCD segment output S9. |+| 22 | P9.7/S10 | bidirectional | General-purpose digital I/O and LCD segment output S10. |+| 23 | P9.6/S11 | bidirectional | General-purpose digital I/O and LCD segment output S11. |+| 24 | P9.5/S12 | bidirectional | General-purpose digital I/O and LCD segment output S12. |+| 25 | P9.4/S13 | bidirectional | General-purpose digital I/O and LCD segment output S13. |+| 26 | P9.3/S14 | bidirectional | General-purpose digital I/O and LCD segment output S14. |+| 27 | P9.2/S15 | bidirectional | General-purpose digital I/O and LCD segment output S15. |+| 28 | P9.1/S16 | bidirectional | General-purpose digital I/O and LCD segment output S16. |+| 29 | P9.0/S17 | bidirectional | General-purpose digital I/O and LCD segment output S17. |+| 30 | P8.7/S18 | bidirectional | General-purpose digital I/O and LCD segment output S18. |+| 31 | P8.6/S19 | bidirectional | General-purpose digital I/O and LCD segment output S19. |+| 32 | P8.5/S20 | bidirectional | General-purpose digital I/O and LCD segment output S20. |+| 33 | P8.4/S21 | bidirectional | General-purpose digital I/O and LCD segment output S21. |+| 34 | P8.3/S22 | bidirectional | General-purpose digital I/O and LCD segment output S22. |+| 35 | P8.2/S23 | bidirectional | General-purpose digital I/O and LCD segment output S23. |+| 36 | P8.1/S24 | bidirectional | General-purpose digital I/O and LCD segment output S24. |+| 37 | P8.0/S25 | bidirectional | General-purpose digital I/O and LCD segment output S25. |+| 38 | P7.7/S26 | bidirectional | General-purpose digital I/O and LCD segment output S26. |+| 39 | P7.6/S27 | bidirectional | General-purpose digital I/O and LCD segment output S27. |+| 40 | P7.5/S28 | bidirectional | General-purpose digital I/O and LCD segment output S28. |+| 41 | P7.4/S29 | bidirectional | General-purpose digital I/O and LCD segment output S29. |+| 42 | P7.3/UCA0CLK/S30 | bidirectional | General-purpose digital I/O, external clock input or clock output for USCI_A0 in UART or SPI mode, and LCD segment output S30. |+| 43 | P7.2/UCA0SOMI/S31 | bidirectional | General-purpose digital I/O, slave out/master in of USCI_A0 in SPI mode, and LCD segment output S31. |+| 44 | P7.1/UCA0SIMO/S32 | bidirectional | General-purpose digital I/O, slave in/master out of USCI_A0 in SPI mode, and LCD segment output S32. |+| 45 | P7.0/UCA0STE/S33 | bidirectional | General-purpose digital I/O, slave transmit enable of USCI_A0 in SPI mode, and LCD segment output S33. |+| 46 | P4.7/UCA0RXD/S34 | bidirectional | General-purpose digital I/O, receive data input of USCI_A0 in UART or IrDA mode, and LCD segment output S34. |+| 47 | P4.6/UCA0TXD/S35 | bidirectional | General-purpose digital I/O, transmit data output of USCI_A0 in UART or IrDA mode, and LCD segment output S35. |+| 48 | P4.5/UCLK1/S36 | bidirectional | General-purpose digital I/O, external clock input or clock output for USART1 in UART or SPI mode, and LCD segment output S36. |+| 49 | P4.4/SOMI1/S37 | bidirectional | General-purpose digital I/O, slave out/master in of USART1 in SPI mode, and LCD segment output S37. |+| 50 | P4.3/SIMO1/S38 | bidirectional | General-purpose digital I/O, slave in/master out of USART1 in SPI mode, and LCD segment output S38. |+| 51 | P4.2/STE1/S39 | bidirectional | General-purpose digital I/O, slave transmit enable of USART1 in SPI mode, and LCD segment output S39. |+| 52 | COM0 | output | LCD backplane common output COM0 (COM0-3 are used for LCD backplanes). |+| 53 | P5.2/COM1 | bidirectional | General-purpose digital I/O and LCD backplane common output COM1. |+| 54 | P5.3/COM2 | bidirectional | General-purpose digital I/O and LCD backplane common output COM2. |+| 55 | P5.4/COM3 | bidirectional | General-purpose digital I/O and LCD backplane common output COM3. |+| 56 | P5.5/R03 | bidirectional | General-purpose digital I/O and input port of the lowest analog LCD level (V5). |+| 57 | P5.6/LCDREF/R13 | bidirectional | General-purpose digital I/O, external reference voltage input for the regulated LCD voltage, and input port of the third most positive analog LCD level (V4 or V3). |+| 58 | P5.7/R23 | bidirectional | General-purpose digital I/O and input port of the second most positive analog LCD level (V2). |+| 59 | LCDCAP/R33 | input | LCD capacitor connection and input/output port of the most positive analog LCD level (V1). |+| 60 | DVCC2 | power_in | Digital supply voltage, positive terminal. |+| 61 | DVSS2 | power_in | Digital supply voltage, negative terminal. |+| 62 | P4.1/URXD1 | bidirectional | General-purpose digital I/O and receive data input for USART1 in UART mode. |+| 63 | P4.0/UTXD1 | bidirectional | General-purpose digital I/O and transmit data output for USART1 in UART mode. |+| 64 | P3.7/TB6 | bidirectional | General-purpose digital I/O and Timer_B7 CCR6 (capture input CCI6A/CCI6B, compare output Out6). |+| 65 | P3.6/TB5 | bidirectional | General-purpose digital I/O and Timer_B7 CCR5 (capture input CCI5A/CCI5B, compare output Out5). |+| 66 | P3.5/TB4 | bidirectional | General-purpose digital I/O and Timer_B7 CCR4 (capture input CCI4A/CCI4B, compare output Out4). |+| 67 | P3.4/TB3 | bidirectional | General-purpose digital I/O and Timer_B7 CCR3 (capture input CCI3A/CCI3B, compare output Out3). |+| 68 | P3.3/UCB0CLK | bidirectional | General-purpose digital I/O, external clock input or clock output for USCI_B0 in UART or SPI mode. |+| 69 | P3.2/UCB0SOMI/UCB0SCL | bidirectional | General-purpose digital I/O, slave out/master in of USCI_B0 in SPI mode, or I2C clock of USCI_B0 in I2C mode. |+| 70 | P3.1/UCB0SIMO/UCB0SDA | bidirectional | General-purpose digital I/O, slave in/master out of USCI_B0 in SPI mode, or I2C data of USCI_B0 in I2C mode. |+| 71 | P3.0/UCB0STE | bidirectional | General-purpose digital I/O and slave transmit enable of USCI_B0 in SPI mode. |+| 72 | P2.7/ADC12CLK/DMAE0 | bidirectional | General-purpose digital I/O, 12-bit ADC conversion clock, and DMA channel 0 external trigger. |+| 73 | P2.6/CAOUT | bidirectional | General-purpose digital I/O and Comparator_A output. |+| 74 | P2.5/UCA0RXD | bidirectional | General-purpose digital I/O and receive data input of USCI_A0 in UART or IrDA mode. |+| 75 | P2.4/UCA0TXD | bidirectional | General-purpose digital I/O and transmit data output of USCI_A0 in UART or IrDA mode. |+| 76 | P2.3/TB2 | bidirectional | General-purpose digital I/O and Timer_B7 CCR2 (capture input CCI2A/CCI2B, compare output Out2). |+| 77 | P2.2/TB1 | bidirectional | General-purpose digital I/O and Timer_B7 CCR1 (capture input CCI1A/CCI1B, compare output Out1). |+| 78 | P2.1/TB0 | bidirectional | General-purpose digital I/O and Timer_B7 CCR0 (capture input CCI0A/CCI0B, compare output Out0). |+| 79 | P2.0/TA2 | bidirectional | General-purpose digital I/O and Timer_A capture input CCI2A or compare output Out2. |+| 80 | P1.7/CA1 | bidirectional | General-purpose digital I/O and Comparator_A input CA1. |+| 81 | P1.6/CA0 | bidirectional | General-purpose digital I/O and Comparator_A input CA0. |+| 82 | P1.5/TACLK/ACLK | bidirectional | General-purpose digital I/O, Timer_A clock input TACLK, and ACLK output (divided by 1, 2, 4, or 8). |+| 83 | P1.4/TBCLK/SMCLK | bidirectional | General-purpose digital I/O, Timer_B7 input clock TBCLK, and submain system clock SMCLK output. |+| 84 | P1.3/TBOUTH/SVSOUT | bidirectional | General-purpose digital I/O, switches all Timer_B PWM outputs (TB0-TB6) to high impedance, and SVS comparator output. |+| 85 | P1.2/TA1 | bidirectional | General-purpose digital I/O, Timer_A capture input CCI1A, or compare output Out1. |+| 86 | P1.1/TA0/MCLK | bidirectional | General-purpose digital I/O, Timer_A capture input CCI0B, MCLK output, and BSL receive; TA0 is only an input on this pin. |+| 87 | P1.0/TA0 | bidirectional | General-purpose digital I/O, Timer_A capture input CCI0A, compare output Out0, and BSL transmit. |+| 88 | XT2OUT | output | Output terminal of crystal oscillator XT2. |+| 89 | XT2IN | input | Input port for crystal oscillator XT2; only standard crystals can be connected. |+| 90 | TDO/TDI | bidirectional | Test data output port; carries TDO/TDI data output or programming data input. |+| 91 | TDI/TCLK | input | Test data input or test clock input; the device protection fuse is connected to this pin. |+| 92 | TMS | input | Test mode select, used as an input port for device programming and test. |+| 93 | TCK | input | Test clock, the clock input port for device programming and test. |+| 94 | RST/NMI | input | Reset input or nonmaskable interrupt input port. |+| 95 | P6.0/A0/OA0I0 | bidirectional | General-purpose digital I/O, analog input A0 to the 12-bit ADC, and OA0 input multiplexer on the + and − terminals. |+| 96 | P6.1/A1/OA0O | bidirectional | General-purpose digital I/O, analog input A1 to the 12-bit ADC, and OA0 output. |+| 97 | P6.2/A2/OA0I1 | bidirectional | General-purpose digital I/O, analog input A2 to the 12-bit ADC, and OA0 input multiplexer on the + and − terminals. |+| 98 | AVSS | power_in | Analog supply voltage, negative terminal; supplies SVS, brownout, oscillator, Comparator_A, and port 1. |+| 99 | DVSS1 | power_in | Digital supply voltage, negative terminal. |+| 100 | AVCC | power_in | Analog supply voltage, positive terminal; supplies SVS, brownout, oscillator, Comparator_A, and port 1, and must not power up prior to DVCC1/DVCC2. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | LQFP-100(14x14) |+| Category | Embedded Processors & Controllers |+| Pins | 100 |++## CAD (KiCad official)++- Symbol: `MSP430FG4618IPZR`+- Footprint: `Package_QFP:LQFP-100_14x14mm_P0.5mm`+- 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)+- 3D model files: `msp430fg4618ipzr-etched.step` / `msp430fg4618ipzr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `msp430fg4618ipzr.step` / `msp430fg4618ipzr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/msp430fg4616) (120 pp, sha256 `32f5a0cebf27eb7f`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/msp430fg4618ipzr-datasheet.pdf)
page.jsonadded+751@@ -0,0 +1,751 @@+{+ "slug": "msp430fg4618ipzr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "msp430fg4618ipzr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "msp430fg4618ipzr.kicad_sym",+ "msp430fg4618ipzr.kicad_mod",+ "msp430fg4618ipzr.glb",+ "msp430fg4618ipzr.step",+ "msp430fg4618ipzr.lbr",+ "docs/hero.png",+ "docs/msp430fg4618ipzr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "msp430fg4618ipzr-hero.glb",+ "msp430fg4618ipzr-hero.overlay.json"+ ],+ "component": {+ "mpn": "MSP430FG4618IPZR",+ "manufacturer": "Texas Instruments",+ "package": "LQFP-100(14x14)",+ "pin_count": 100,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/msp430fg4616",+ "parts": {+ "symbol": "msp430fg4618ipzr.kicad_sym",+ "footprint": "msp430fg4618ipzr.kicad_mod",+ "model_3d": "msp430fg4618ipzr-hero.glb",+ "model_3d_plain": "msp430fg4618ipzr.glb",+ "model_3d_step": "msp430fg4618ipzr-etched.step",+ "model_3d_step_plain": "msp430fg4618ipzr.step",+ "lbr": "msp430fg4618ipzr.lbr"+ },+ "distributor_links": {+ "lcsc": "C882390",+ "digikey": "296-41336-2-ND",+ "mouser": "595-MSP430FG4618IPZR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T02:53:35Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-41336-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-MSP430FG4618IPZR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "DVCC1",+ "type": "power_in",+ "description": "Digital supply voltage, positive terminal."+ },+ {+ "number": "2",+ "name": "P6.3/A3/OA1O",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, with analog input A3 to the 12-bit ADC and the OA1 output."+ },+ {+ "number": "3",+ "name": "P6.4/A4/OA1I0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, with analog input A4 to the 12-bit ADC and the OA1 input multiplexer on the + and − terminals."+ },+ {+ "number": "4",+ "name": "P6.5/A5/OA2O",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, with analog input A5 to the 12-bit ADC and the OA2 output."+ },+ {+ "number": "5",+ "name": "P6.6/A6/DAC0/OA2I0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, with analog input A6 to the 12-bit ADC, DAC12.0 output, and the OA2 input multiplexer on the + and − terminals."+ },+ {+ "number": "6",+ "name": "P6.7/A7/DAC1/SVSIN",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, with analog input A7 to the 12-bit ADC, DAC12.1 output, and analog input to the brownout/supply voltage supervisor."+ },+ {+ "number": "7",+ "name": "VREF+",+ "type": "power_in",+ "description": "Output of the positive terminal of the reference voltage in the ADC."+ },+ {+ "number": "8",+ "name": "XIN",+ "type": "input",+ "description": "Input port for crystal oscillator XT1; standard or watch crystals can be connected."+ },+ {+ "number": "9",+ "name": "XOUT",+ "type": "output",+ "description": "Output terminal of crystal oscillator XT1."+ },+ {+ "number": "10",+ "name": "VeREF+/DAC0",+ "type": "bidirectional",+ "description": "Input for an external reference voltage to the ADC, or the DAC12.0 output."+ },+ {+ "number": "11",+ "name": "VREF−/VeREF−",+ "type": "power_in",+ "description": "Negative terminal for the ADC reference voltage, either the internal reference or an externally applied reference voltage."+ },+ {+ "number": "12",+ "name": "P5.1/S0/A12/DAC1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, LCD segment output S0, analog input A12 to the ADC, and DAC12.1 output; segments S0-S3 are disabled when the LCD charge pump is enabled."+ },+ {+ "number": "13",+ "name": "P5.0/S1/A13/OA1I1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, LCD segment output S1, analog input A13 to the ADC, and the OA1 input multiplexer; S1 is disabled when the LCD charge pump is enabled."+ },+ {+ "number": "14",+ "name": "P10.7/S2/A14/OA2I1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, LCD segment output S2, analog input A14 to the ADC, and the OA2 input multiplexer; S2 is disabled when the LCD charge pump is enabled."+ },+ {+ "number": "15",+ "name": "P10.6/S3/A15",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, LCD segment output S3, and analog input A15 to the ADC; S3 is disabled when the LCD charge pump is enabled."+ },+ {+ "number": "16",+ "name": "P10.5/S4",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S4."+ },+ {+ "number": "17",+ "name": "P10.4/S5",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S5."+ },+ {+ "number": "18",+ "name": "P10.3/S6",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S6."+ },+ {+ "number": "19",+ "name": "P10.2/S7",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S7."+ },+ {+ "number": "20",+ "name": "P10.1/S8",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S8."+ },+ {+ "number": "21",+ "name": "P10.0/S9",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S9."+ },+ {+ "number": "22",+ "name": "P9.7/S10",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S10."+ },+ {+ "number": "23",+ "name": "P9.6/S11",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S11."+ },+ {+ "number": "24",+ "name": "P9.5/S12",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S12."+ },+ {+ "number": "25",+ "name": "P9.4/S13",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S13."+ },+ {+ "number": "26",+ "name": "P9.3/S14",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S14."+ },+ {+ "number": "27",+ "name": "P9.2/S15",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S15."+ },+ {+ "number": "28",+ "name": "P9.1/S16",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S16."+ },+ {+ "number": "29",+ "name": "P9.0/S17",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S17."+ },+ {+ "number": "30",+ "name": "P8.7/S18",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S18."+ },+ {+ "number": "31",+ "name": "P8.6/S19",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S19."+ },+ {+ "number": "32",+ "name": "P8.5/S20",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S20."+ },+ {+ "number": "33",+ "name": "P8.4/S21",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S21."+ },+ {+ "number": "34",+ "name": "P8.3/S22",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S22."+ },+ {+ "number": "35",+ "name": "P8.2/S23",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S23."+ },+ {+ "number": "36",+ "name": "P8.1/S24",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S24."+ },+ {+ "number": "37",+ "name": "P8.0/S25",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S25."+ },+ {+ "number": "38",+ "name": "P7.7/S26",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S26."+ },+ {+ "number": "39",+ "name": "P7.6/S27",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S27."+ },+ {+ "number": "40",+ "name": "P7.5/S28",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S28."+ },+ {+ "number": "41",+ "name": "P7.4/S29",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD segment output S29."+ },+ {+ "number": "42",+ "name": "P7.3/UCA0CLK/S30",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, external clock input or clock output for USCI_A0 in UART or SPI mode, and LCD segment output S30."+ },+ {+ "number": "43",+ "name": "P7.2/UCA0SOMI/S31",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, slave out/master in of USCI_A0 in SPI mode, and LCD segment output S31."+ },+ {+ "number": "44",+ "name": "P7.1/UCA0SIMO/S32",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, slave in/master out of USCI_A0 in SPI mode, and LCD segment output S32."+ },+ {+ "number": "45",+ "name": "P7.0/UCA0STE/S33",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, slave transmit enable of USCI_A0 in SPI mode, and LCD segment output S33."+ },+ {+ "number": "46",+ "name": "P4.7/UCA0RXD/S34",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, receive data input of USCI_A0 in UART or IrDA mode, and LCD segment output S34."+ },+ {+ "number": "47",+ "name": "P4.6/UCA0TXD/S35",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, transmit data output of USCI_A0 in UART or IrDA mode, and LCD segment output S35."+ },+ {+ "number": "48",+ "name": "P4.5/UCLK1/S36",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, external clock input or clock output for USART1 in UART or SPI mode, and LCD segment output S36."+ },+ {+ "number": "49",+ "name": "P4.4/SOMI1/S37",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, slave out/master in of USART1 in SPI mode, and LCD segment output S37."+ },+ {+ "number": "50",+ "name": "P4.3/SIMO1/S38",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, slave in/master out of USART1 in SPI mode, and LCD segment output S38."+ },+ {+ "number": "51",+ "name": "P4.2/STE1/S39",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, slave transmit enable of USART1 in SPI mode, and LCD segment output S39."+ },+ {+ "number": "52",+ "name": "COM0",+ "type": "output",+ "description": "LCD backplane common output COM0 (COM0-3 are used for LCD backplanes)."+ },+ {+ "number": "53",+ "name": "P5.2/COM1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD backplane common output COM1."+ },+ {+ "number": "54",+ "name": "P5.3/COM2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD backplane common output COM2."+ },+ {+ "number": "55",+ "name": "P5.4/COM3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and LCD backplane common output COM3."+ },+ {+ "number": "56",+ "name": "P5.5/R03",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and input port of the lowest analog LCD level (V5)."+ },+ {+ "number": "57",+ "name": "P5.6/LCDREF/R13",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, external reference voltage input for the regulated LCD voltage, and input port of the third most positive analog LCD level (V4 or V3)."+ },+ {+ "number": "58",+ "name": "P5.7/R23",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and input port of the second most positive analog LCD level (V2)."+ },+ {+ "number": "59",+ "name": "LCDCAP/R33",+ "type": "input",+ "description": "LCD capacitor connection and input/output port of the most positive analog LCD level (V1)."+ },+ {+ "number": "60",+ "name": "DVCC2",+ "type": "power_in",+ "description": "Digital supply voltage, positive terminal."+ },+ {+ "number": "61",+ "name": "DVSS2",+ "type": "power_in",+ "description": "Digital supply voltage, negative terminal."+ },+ {+ "number": "62",+ "name": "P4.1/URXD1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and receive data input for USART1 in UART mode."+ },+ {+ "number": "63",+ "name": "P4.0/UTXD1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and transmit data output for USART1 in UART mode."+ },+ {+ "number": "64",+ "name": "P3.7/TB6",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and Timer_B7 CCR6 (capture input CCI6A/CCI6B, compare output Out6)."+ },+ {+ "number": "65",+ "name": "P3.6/TB5",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and Timer_B7 CCR5 (capture input CCI5A/CCI5B, compare output Out5)."+ },+ {+ "number": "66",+ "name": "P3.5/TB4",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and Timer_B7 CCR4 (capture input CCI4A/CCI4B, compare output Out4)."+ },+ {+ "number": "67",+ "name": "P3.4/TB3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and Timer_B7 CCR3 (capture input CCI3A/CCI3B, compare output Out3)."+ },+ {+ "number": "68",+ "name": "P3.3/UCB0CLK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, external clock input or clock output for USCI_B0 in UART or SPI mode."+ },+ {+ "number": "69",+ "name": "P3.2/UCB0SOMI/UCB0SCL",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, slave out/master in of USCI_B0 in SPI mode, or I2C clock of USCI_B0 in I2C mode."+ },+ {+ "number": "70",+ "name": "P3.1/UCB0SIMO/UCB0SDA",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, slave in/master out of USCI_B0 in SPI mode, or I2C data of USCI_B0 in I2C mode."+ },+ {+ "number": "71",+ "name": "P3.0/UCB0STE",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and slave transmit enable of USCI_B0 in SPI mode."+ },+ {+ "number": "72",+ "name": "P2.7/ADC12CLK/DMAE0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, 12-bit ADC conversion clock, and DMA channel 0 external trigger."+ },+ {+ "number": "73",+ "name": "P2.6/CAOUT",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and Comparator_A output."+ },+ {+ "number": "74",+ "name": "P2.5/UCA0RXD",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and receive data input of USCI_A0 in UART or IrDA mode."+ },+ {+ "number": "75",+ "name": "P2.4/UCA0TXD",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and transmit data output of USCI_A0 in UART or IrDA mode."+ },+ {+ "number": "76",+ "name": "P2.3/TB2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and Timer_B7 CCR2 (capture input CCI2A/CCI2B, compare output Out2)."+ },+ {+ "number": "77",+ "name": "P2.2/TB1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and Timer_B7 CCR1 (capture input CCI1A/CCI1B, compare output Out1)."+ },+ {+ "number": "78",+ "name": "P2.1/TB0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and Timer_B7 CCR0 (capture input CCI0A/CCI0B, compare output Out0)."+ },+ {+ "number": "79",+ "name": "P2.0/TA2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and Timer_A capture input CCI2A or compare output Out2."+ },+ {+ "number": "80",+ "name": "P1.7/CA1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and Comparator_A input CA1."+ },+ {+ "number": "81",+ "name": "P1.6/CA0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O and Comparator_A input CA0."+ },+ {+ "number": "82",+ "name": "P1.5/TACLK/ACLK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, Timer_A clock input TACLK, and ACLK output (divided by 1, 2, 4, or 8)."+ },+ {+ "number": "83",+ "name": "P1.4/TBCLK/SMCLK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, Timer_B7 input clock TBCLK, and submain system clock SMCLK output."+ },+ {+ "number": "84",+ "name": "P1.3/TBOUTH/SVSOUT",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, switches all Timer_B PWM outputs (TB0-TB6) to high impedance, and SVS comparator output."+ },+ {+ "number": "85",+ "name": "P1.2/TA1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, Timer_A capture input CCI1A, or compare output Out1."+ },+ {+ "number": "86",+ "name": "P1.1/TA0/MCLK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, Timer_A capture input CCI0B, MCLK output, and BSL receive; TA0 is only an input on this pin."+ },+ {+ "number": "87",+ "name": "P1.0/TA0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, Timer_A capture input CCI0A, compare output Out0, and BSL transmit."+ },+ {+ "number": "88",+ "name": "XT2OUT",+ "type": "output",+ "description": "Output terminal of crystal oscillator XT2."+ },+ {+ "number": "89",+ "name": "XT2IN",+ "type": "input",+ "description": "Input port for crystal oscillator XT2; only standard crystals can be connected."+ },+ {+ "number": "90",+ "name": "TDO/TDI",+ "type": "bidirectional",+ "description": "Test data output port; carries TDO/TDI data output or programming data input."+ },+ {+ "number": "91",+ "name": "TDI/TCLK",+ "type": "input",+ "description": "Test data input or test clock input; the device protection fuse is connected to this pin."+ },+ {+ "number": "92",+ "name": "TMS",+ "type": "input",+ "description": "Test mode select, used as an input port for device programming and test."+ },+ {+ "number": "93",+ "name": "TCK",+ "type": "input",+ "description": "Test clock, the clock input port for device programming and test."+ },+ {+ "number": "94",+ "name": "RST/NMI",+ "type": "input",+ "description": "Reset input or nonmaskable interrupt input port."+ },+ {+ "number": "95",+ "name": "P6.0/A0/OA0I0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, analog input A0 to the 12-bit ADC, and OA0 input multiplexer on the + and − terminals."+ },+ {+ "number": "96",+ "name": "P6.1/A1/OA0O",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, analog input A1 to the 12-bit ADC, and OA0 output."+ },+ {+ "number": "97",+ "name": "P6.2/A2/OA0I1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O, analog input A2 to the 12-bit ADC, and OA0 input multiplexer on the + and − terminals."+ },+ {+ "number": "98",+ "name": "AVSS",+ "type": "power_in",+ "description": "Analog supply voltage, negative terminal; supplies SVS, brownout, oscillator, Comparator_A, and port 1."+ },+ {+ "number": "99",+ "name": "DVSS1",+ "type": "power_in",+ "description": "Digital supply voltage, negative terminal."+ },+ {+ "number": "100",+ "name": "AVCC",+ "type": "power_in",+ "description": "Analog supply voltage, positive terminal; supplies SVS, brownout, oscillator, Comparator_A, and port 1, and must not power up prior to DVCC1/DVCC2."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin 59 LCDCAP/R33 is listed as type 'I' in the terminal table but its description says it is an inpu; Pin 90 TDO/TDI is listed as I/O in the terminal table; it is typed bidirectional here, while TDI/TCL; Several port pages contain labelling errors that disagree with the Terminal Functions table (e.g. P1"+ ],+ "pages_sent": 55,+ "cost_usd": 0.2487,+ "at": "2026-10-08T02:53:01"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/msp430fg4616",+ "pages": 120,+ "sha256": "32f5a0cebf27eb7f",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 100,+ "described": 100,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "msp430fg4618ipzr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 16,+ 16,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "51720097260ffba41c3062f85f67623721102fa535901c47cb555a1f444feeb3",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "msp430fg4618ipzr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 16,+ 16,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "9f53662d393e985167f52fdf4f2f82d33366447970816a5a7878635ac29c664c",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}