# MSP430FG4250IRGZR

**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · VQFN-48-EP(7x7)

MSP430FG4250IRGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVSS | power_in | Digital supply voltage, negative terminal. |
| 2 | XIN | input | Input terminal of crystal oscillator XT1. |
| 3 | XOUT | output | Output terminal of crystal oscillator XT1. |
| 4 | AVSS | power_in | Analog supply voltage, negative terminal. |
| 5 | AVCC | power_in | Analog supply voltage, positive terminal. |
| 6 | VREF | power_in | Analog reference voltage. |
| 7 | P6.0/A0+/OA0O | bidirectional | General-purpose digital I/O / analog input A0+ / OA0 output. |
| 8 | P6.1/A0−/OA0FB | bidirectional | General-purpose digital I/O / analog input A0− / OA0 feedback input. |
| 9 | P6.2/A1+/OA1O | bidirectional | General-purpose digital I/O / analog input A1+ / OA1 output. |
| 10 | P6.3/A1−/OA1FB | bidirectional | General-purpose digital I/O / analog input A1− / OA1 feedback input. |
| 11 | P6.4/OA0I1 | bidirectional | General-purpose digital I/O / OA0 input multiplexer on −terminal. |
| 12 | P6.5/OA0I2 | bidirectional | General-purpose digital I/O / OA0 input multiplexer on −terminal. |
| 13 | P6.6/OA1I1 | bidirectional | General-purpose digital I/O / OA1 input multiplexer on −terminal. |
| 14 | P6.7/OA1I2 | bidirectional | General-purpose digital I/O / OA1 input multiplexer on −terminal. |
| 15 | P1.7/A2+ | bidirectional | General-purpose digital I/O / analog input A2+. |
| 16 | P1.6/A2−/OA0I0 | bidirectional | General-purpose digital I/O / analog input A2− / OA0 input multiplexer on +terminal. |
| 17 | P1.5/TACLK/ACLK/A3+ | bidirectional | General-purpose digital I/O / Timer_A clock signal TACLK input / ACLK output (divided by 1, 2, 4, or 8) / analog input A3+. |
| 18 | P1.4/A3−/OA1I0/DAC0 | bidirectional | General-purpose digital I/O / analog input A3− / OA1 input multiplexer on +terminal / DAC12 output. |
| 19 | P1.3/TA2/A4+ | bidirectional | General-purpose digital I/O / Timer_A capture CCI2A, compare Out2 output / analog input A4+. |
| 20 | P1.2/TA1/A4− | bidirectional | General-purpose digital I/O / Timer_A capture CCI1A, compare Out1 output / analog input A4−. |
| 21 | P1.1/TA0/MCLK | bidirectional | General-purpose digital I/O / Timer_A capture CCI0B / MCLK output; TA0 is only an input on this pin / BSL receive. |
| 22 | P1.0/TA0 | bidirectional | General-purpose digital I/O / Timer_A capture CCI0A input, compare Out0 output / BSL transmit. |
| 23 | LCDREF/R13 | input | External LCD reference voltage input / input port of third most positive analog LCD level (V4 or V3). |
| 24 | LCDCAP/R23 | passive | Capacitor connection for LCD charge pump / input port of second most positive analog LCD level (V2). |
| 25 | P5.1/S0 | bidirectional | General-purpose digital I/O / LCD segment output 0. |
| 26 | P5.0/S1 | bidirectional | General-purpose digital I/O / LCD segment output 1. |
| 27 | P5.5/S2 | bidirectional | General-purpose digital I/O / LCD segment output 2. |
| 28 | P5.6/S3 | bidirectional | General-purpose digital I/O / LCD segment output 3. |
| 29 | P5.7/S4 | bidirectional | General-purpose digital I/O / LCD segment output 4. |
| 30 | S5 | output | LCD segment output 5. |
| 31 | P2.7/S6 | bidirectional | General-purpose digital I/O / LCD segment output 6. |
| 32 | P2.6/S7 | bidirectional | General-purpose digital I/O / LCD segment output 7. |
| 33 | P2.5/S8 | bidirectional | General-purpose digital I/O / LCD segment output 8. |
| 34 | P2.4/S9 | bidirectional | General-purpose digital I/O / LCD segment output 9. |
| 35 | P2.3/S10 | bidirectional | General-purpose digital I/O / LCD segment output 10. |
| 36 | P2.2/S11 | bidirectional | General-purpose digital I/O / LCD segment output 11. |
| 37 | P2.1/S12/SW1C | bidirectional | General-purpose digital I/O / LCD segment output 12 / low-resistance switch to VSS. |
| 38 | P2.0/S13/SW0C | bidirectional | General-purpose digital I/O / LCD segment output 13 / low-resistance switch to VSS. |
| 39 | COM0 | output | Common output; COM0−COM3 are used for LCD backplanes. |
| 40 | P5.2/COM1 | bidirectional | General-purpose digital I/O / common output; COM0−COM3 are used for LCD backplanes. |
| 41 | P5.3/COM2 | bidirectional | General-purpose digital I/O / common output; COM0−COM3 are used for LCD backplanes. |
| 42 | P5.4/COM3 | bidirectional | General-purpose digital I/O / common output; COM0−COM3 are used for LCD backplanes. |
| 43 | TDO/TDI | bidirectional | Test data output; TDO/TDI data output or programming data input terminal. |
| 44 | TDI/TCLK | input | Test data input / test clock input; the device protection fuse is connected to TDI/TCLK. |
| 45 | TMS | input | Test mode select; TMS is used as an input port for device programming and test. |
| 46 | TCK | input | Test clock; TCK is the clock input port for device programming and test. |
| 47 | RST/NMI | input | General-purpose digital I/O / reset input / nonmaskable interrupt input. |
| 48 | DVCC | power_in | Digital supply voltage, positive terminal. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-48-EP(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 49 |

## CAD (KiCad official)

- Symbol: `MSP430FG4250IRGZR`
- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`
- 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files: `msp430fg4250irgzr-etched.step` / `msp430fg4250irgzr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `msp430fg4250irgzr.step` / `msp430fg4250irgzr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/msp430fg4270) (70 pp, sha256 `a1db9079824a3732`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/msp430fg4250irgzr-datasheet.pdf)