component

MSP430FE4272IPMR

Public Made by Adom

by adom

Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersmsp430fe4272ipmrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

MSP430FE4272IPMR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

MSP430FE4272IPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVCC power_in Digital supply voltage, positive terminal for core digital logic.
2 I1+ input Current 1 positive analog input with internal connection to SD16 Channel 0 A0+.
3 I1− input Current 1 negative analog input with internal connection to SD16 Channel 0 A0−.
4 NC unconnected Not connected; connection to analog ground (AVSS) recommended.
5 NC unconnected Not connected; connection to analog ground (AVSS) recommended.
6 V1+ input Voltage 1 positive analog input with internal connection to SD16 Channel 1 A0+.
7 V1− input Voltage 1 negative analog input with internal connection to SD16 Channel 1 A0−.
8 XIN input Input port for crystal oscillator XT1; standard or watch crystals can be connected.
9 XOUT output Output terminal of crystal oscillator XT1.
10 VREF power_in Input for external reference voltage or internal reference voltage output (can be used as mid-voltage).
11 P2.2/STE0 bidirectional General-purpose digital I/O or slave transmit enable (USART0/SPI mode).
12 S0 output LCD segment output 0.
13 S1 output LCD segment output 1.
14 S2 output LCD segment output 2.
15 S3 output LCD segment output 3.
16 S4 output LCD segment output 4.
17 S5 output LCD segment output 5.
18 S6 output LCD segment output 6.
19 S7 output LCD segment output 7.
20 S8 output LCD segment output 8.
21 S9 output LCD segment output 9.
22 S10 output LCD segment output 10.
23 S11 output LCD segment output 11.
24 S12 output LCD segment output 12.
25 S13 output LCD segment output 13.
26 S14 output LCD segment output 14.
27 S15 output LCD segment output 15.
28 S16 output LCD segment output 16.
29 S17 output LCD segment output 17.
30 S18 output LCD segment output 18.
31 S19 output LCD segment output 19.
32 S20 output LCD segment output 20.
33 S21 output LCD segment output 21.
34 S22 output LCD segment output 22.
35 S23 output LCD segment output 23.
36 COM0 output LCD common output used for LCD backplane drive (COM0−3).
37 COM1 output LCD common output used for LCD backplane drive (COM0−3).
38 COM2 output LCD common output used for LCD backplane drive (COM0−3).
39 COM3 output LCD common output used for LCD backplane drive (COM0−3).
40 R03 input Input port of fourth positive (lowest) analog LCD level (V5).
41 R13 input Input port of third most positive analog LCD level (V4 or V3).
42 R23 input Input port of second most positive analog LCD level (V2).
43 R33 output Output port of most positive analog LCD level (V1).
44 P2.1/UCLK0/S24 bidirectional General-purpose digital I/O or external clock input/output (USART0 UART/SPI mode) or LCD segment output 24.
45 P2.0/TA2/S25 bidirectional General-purpose digital I/O or Timer_A capture/compare (CCI2A input, Out2 output) or LCD segment output 25.
46 P1.7/SOMI0/S26 bidirectional General-purpose digital I/O or slave out/master in (USART0/SPI mode) or LCD segment output 26.
47 P1.6/SIMO0/S27 bidirectional General-purpose digital I/O or slave in/master out (USART0/SPI mode) or LCD segment output 27.
48 P1.5/TACLK/ACLK/S28 bidirectional General-purpose digital I/O or Timer_A and SD16 clock input (TACLK) or ACLK output (divided by 1, 2, 4, or 8) or LCD segment output 28.
49 P1.4/S29 bidirectional General-purpose digital I/O or LCD segment output 29.
50 P1.3/SVSOUT/S30 bidirectional General-purpose digital I/O or SVS comparator output or LCD segment output 30.
51 P1.2/TA1/S31 bidirectional General-purpose digital I/O or Timer_A capture/compare (CCI1A, CCI1B input, Out1 output) or LCD segment output 31.
52 P1.1/TA0/MCLK bidirectional General-purpose digital I/O or Timer_A capture (CCI0B input) or MCLK output or BSL receive.
53 P1.0/TA0 bidirectional General-purpose digital I/O or Timer_A capture/compare (CCI0A input, Out0 output) or BSL transmit.
54 TDO/TDI bidirectional Test data output port or programming data input terminal.
55 TDI/TCLK input Test data input or test clock input; device protection fuse is connected to TDI.
56 TMS input Test mode select; used as input port for device programming and test.
57 TCK input Test clock; clock input port for device programming and test.
58 RST/NMI input Reset input or nonmaskable interrupt input port.
59 P2.5/URXD0 bidirectional General-purpose digital I/O or receive data in (USART0/UART mode).
60 P2.4/UTXD0 bidirectional General-purpose digital I/O or transmit data out (USART0/UART mode).
61 P2.3/SVSIN bidirectional General-purpose digital I/O or analog input to brownout and supply voltage supervisor.
62 AVSS power_in Analog supply voltage, negative terminal; supplies SD16, SVS, brownout, oscillator, and LCD resistive divider circuitry.
63 DVSS power_in Digital supply voltage, negative terminal.
64 AVCC power_in Analog supply voltage, positive terminal; supplies SD16, SVS, brownout, oscillator, and LCD resistive divider; must not power up prior to DVCC.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: MSP430FE4272IPMR
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: msp430fe4272ipmr-etched.step / msp430fe4272ipmr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430fe4272ipmr.step / msp430fe4272ipmr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (52 pp, sha256 7b5b56cbebee669f, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF