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MSP430FE425AIPMR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

MSP430FE425AIPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVCC power_in Digital supply voltage positive terminal.
2 I1+ input Current 1 positive analog input; internal connection to SD16 Channel 0 A0+ for energy metering.
3 I1-- input Current 1 negative analog input; internal connection to SD16 Channel 0 A0--.
4 I2+ input Current 2 positive analog input; internal connection to SD16 Channel 1 A0+ for energy metering.
5 I2-- input Current 2 negative analog input; internal connection to SD16 Channel 1 A0--.
6 V1+ input Voltage 1 positive analog input; internal connection to SD16 Channel 2 A0+ for energy metering.
7 V1-- input Voltage 1 negative analog input; internal connection to SD16 Channel 2 A0--.
8 XIN input Input for crystal oscillator XT1; accepts standard or watch crystals.
9 XOUT output Output of crystal oscillator XT1.
10 VREF power_in Input for external reference voltage or internal reference voltage output for mid-voltage generation.
11 P2.2/STE0 bidirectional General-purpose digital I/O or slave transmit enable in USART0/SPI mode.
12 S0 output LCD segment output 0 for driving display segments.
13 S1 output LCD segment output 1 for driving display segments.
14 S2 output LCD segment output 2 for driving display segments.
15 S3 output LCD segment output 3 for driving display segments.
16 S4 output LCD segment output 4 for driving display segments.
17 S5 output LCD segment output 5 for driving display segments.
18 S6 output LCD segment output 6 for driving display segments.
19 S7 output LCD segment output 7 for driving display segments.
20 S8 output LCD segment output 8 for driving display segments.
21 S9 output LCD segment output 9 for driving display segments.
22 S10 output LCD segment output 10 for driving display segments.
23 S11 output LCD segment output 11 for driving display segments.
24 S12 output LCD segment output 12 for driving display segments.
25 S13 output LCD segment output 13 for driving display segments.
26 S14 output LCD segment output 14 for driving display segments.
27 S15 output LCD segment output 15 for driving display segments.
28 S16 output LCD segment output 16 for driving display segments.
29 S17 output LCD segment output 17 for driving display segments.
30 S18 output LCD segment output 18 for driving display segments.
31 S19 output LCD segment output 19 for driving display segments.
32 S20 output LCD segment output 20 for driving display segments.
33 S21 output LCD segment output 21 for driving display segments.
34 S22 output LCD segment output 22 for driving display segments.
35 S23 output LCD segment output 23 for driving display segments.
36 COM0 output Common output COM0-3 used for LCD backplane driving.
37 COM1 output Common output COM0-3 used for LCD backplane driving.
38 COM2 output Common output COM0-3 used for LCD backplane driving.
39 COM3 output Common output COM0-3 used for LCD backplane driving.
40 R03 input Input of fourth positive (lowest) analog LCD level (V5).
41 R13 input Input of third most positive analog LCD level (V4 or V3).
42 R23 input Input of second most positive analog LCD level (V2).
43 R33 output Output of most positive analog LCD level (V1).
44 P2.1/UCLK0/S24 bidirectional General-purpose digital I/O, external clock input or clock output for USART0, or LCD segment output 24.
45 P2.0/TA2/S25 bidirectional General-purpose digital I/O, Timer_A CCI2A input or Out2 output, or LCD segment output 25.
46 P1.7/SOMI0/S26 bidirectional General-purpose digital I/O, USART0/SPI slave out/master in, or LCD segment output 26.
47 P1.6/SIMO0/S27 bidirectional General-purpose digital I/O, USART0/SPI slave in/master out, or LCD segment output 27.
48 P1.5/TACLK/ACLK/S28 bidirectional General-purpose digital I/O, Timer_A and SD16 clock TACLK input, ACLK output divided by 1/2/4/8, or LCD segment output 28.
49 P1.4/S29 bidirectional General-purpose digital I/O or LCD segment output 29.
50 P1.3/SVSOUT/S30 bidirectional General-purpose digital I/O, SVS comparator output, or LCD segment output 30.
51 P1.2/TA1/S31 bidirectional General-purpose digital I/O, Timer_A CCI1A or CCI1B input or Out1 output, or LCD segment output 31.
52 P1.1/TA0/MCLK bidirectional General-purpose digital I/O, Timer_A CCI0B input, MCLK output, or BSL receive in bootstrap loader mode.
53 P1.0/TA0 bidirectional General-purpose digital I/O, Timer_A CCI0A input or Out0 output, or BSL transmit in bootstrap loader mode.
54 TDO/TDI bidirectional Test data output (TDO) or programming data input terminal (TDI).
55 TDI/TCLK input Test data input or test clock input; device protection fuse connected to TDI.
56 TMS input Test mode select input for JTAG device programming and test.
57 TCK input Test clock input for JTAG device programming and test.
58 RST/NMI input Reset input or nonmaskable interrupt input port.
59 P2.5/URXD0 bidirectional General-purpose digital I/O or receive data input in USART0/UART mode.
60 P2.4/UTXD0 bidirectional General-purpose digital I/O or transmit data output in USART0/UART mode.
61 P2.3/SVSIN bidirectional General-purpose digital I/O or analog input to brownout and supply voltage supervisor.
62 AVSS power_in Analog supply voltage negative terminal; supplies SD16, SVS, brownout, oscillator, and LCD resistive divider.
63 DVSS power_in Digital supply voltage negative terminal.
64 AVCC power_in Analog supply voltage positive terminal; supplies SD16, SVS, brownout, oscillator, and LCD resistive divider; must not power up prior to DVCC.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: MSP430FE425AIPMR
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: msp430fe425aipmr-etched.step / msp430fe425aipmr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430fe425aipmr.step / msp430fe425aipmr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (47 pp, sha256 7fe6aa953e63276b, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF