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MSP430F6736AIPNR

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Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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MSP430F6736AIPNR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-80(12x12)

MSP430F6736AIPNR from Texas Instruments, in a LQFP-80(12x12). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SD0P0 input SD24_B positive analog input for converter 0 differential pair
2 SD0N0 input SD24_B negative analog input for converter 0 differential pair
3 SD1P0 input SD24_B positive analog input for converter 1 differential pair
4 SD1N0 input SD24_B negative analog input for converter 1 differential pair
5 SD2P0 input SD24_B positive analog input for converter 2 (not available on F672xA)
6 SD2N0 input SD24_B negative analog input for converter 2 (not available on F672xA)
7 VREF power_in SD24_B external reference voltage output
8 AVSS power_in Analog ground supply
9 AVCC power_in Analog power supply
10 VASYS power_in Analog power supply selected between AVCC, AUXVCC1, AUXVCC2 with recommended CVSYS capacitor
11 P1.0/VeREF-/A2 bidirectional General-purpose digital I/O with port interrupt and mappable secondary function; also ADC input A2 and ADC reference negative terminal
12 P1.1/VeREF+/A1 bidirectional General-purpose digital I/O with port interrupt and mappable secondary function; also ADC input A1 and ADC reference positive terminal
13 P1.2/A0 bidirectional General-purpose digital I/O with port interrupt and mappable secondary function; also ADC input A0 and eUSCI_A0 UART/SPI interface
14 P1.3/R03 bidirectional General-purpose digital I/O with port interrupt and mappable secondary function; also LCD voltage reference output R03 and eUSCI_A0 UART/SPI interface
15 AUXVCC2 power_in Auxiliary power supply AUXVCC2
16 AUXVCC1 power_in Auxiliary power supply AUXVCC1
17 VDSYS power_in Digital power supply selected between DVCC, AUXVCC1, AUXVCC2 with recommended CVSYS capacitor; must be connected externally
18 DVCC power_in Digital power supply
19 DVSS power_in Digital ground supply
20 VCORE power_in Regulated core power supply for internal use only with recommended CVCORE capacitor; no external current loading allowed
21 XIN input Input terminal for 32768 Hz crystal oscillator
22 XOUT output Output terminal for 32768 Hz crystal oscillator
23 AUXVCC3 power_in Auxiliary power supply AUXVCC3 for backup subsystem
24 P1.4/LCDREF/R13 bidirectional General-purpose digital I/O with port interrupt and mappable secondary function; also LCD external reference voltage input and LCD voltage reference output R13 for eUSCI_A1 interface
25 P1.5/R23 bidirectional General-purpose digital I/O with port interrupt and mappable secondary function; also LCD voltage reference output R23 and eUSCI_A1 UART/SPI interface
26 LCDCAP/R33 passive LCD capacitor connection and LCD voltage reference output R33; must be connected to DVSS if not used
27 COM0 output LCD common output COM0 for LCD backplane
28 COM1 output LCD common output COM1 for LCD backplane
29 COM2 output LCD common output COM2 for LCD backplane
30 COM3 output LCD common output COM3 for LCD backplane
31 P1.6/COM4 bidirectional General-purpose digital I/O with port interrupt and mappable secondary function; also LCD common output COM4 and eUSCI_A0 clock
32 P1.7/COM5 bidirectional General-purpose digital I/O with port interrupt and mappable secondary function; also LCD common output COM5 and eUSCI_B0 clock
33 P2.0/COM6/S39 bidirectional General-purpose digital I/O with port interrupt and mappable secondary function; also LCD common output COM6, segment output S39, and eUSCI_B0 I2C/SPI interface
34 P2.1/COM7/S38 bidirectional General-purpose digital I/O with port interrupt and mappable secondary function; also LCD common output COM7, segment output S38, and eUSCI_B0 I2C/SPI interface
35 P2.2/S37 bidirectional General-purpose digital I/O with port interrupt and mappable secondary function; also LCD segment output S37 and eUSCI_A2 UART/SPI interface
36 P2.3/S36 bidirectional General-purpose digital I/O with port interrupt and mappable secondary function; also LCD segment output S36 and eUSCI_A2 UART/SPI interface
37 P2.4/S35 bidirectional General-purpose digital I/O with port interrupt and mappable secondary function; also LCD segment output S35 and eUSCI_A1 clock
38 P2.5/S34 bidirectional General-purpose digital I/O with port interrupt and mappable secondary function; also LCD segment output S34 and eUSCI_A2 clock
39 P2.6/S33 bidirectional General-purpose digital I/O with port interrupt and mappable secondary function; also LCD segment output S33 and Timer TA1 CCR0 capture/compare
40 P2.7/S32 bidirectional General-purpose digital I/O with port interrupt and mappable secondary function; also LCD segment output S32 and Timer TA1 CCR1 capture/compare
41 P3.0/S31/BSL_TX bidirectional General-purpose digital I/O with mappable secondary function; also LCD segment output S31, Timer TA2 CCR0, and Bootloader data transmit
42 P3.1/S30/BSL_RX bidirectional General-purpose digital I/O with mappable secondary function; also LCD segment output S30, Timer TA2 CCR1, and Bootloader data receive
43 P3.2/S29 bidirectional General-purpose digital I/O with mappable secondary function; also LCD segment output S29, Timer clock TACLK, and RTC clock output
44 P3.3/S28 bidirectional General-purpose digital I/O with mappable secondary function; also LCD segment output S28 and Timer TA0 CCR2 capture/compare
45 P3.4/S27 bidirectional General-purpose digital I/O with mappable secondary function; also LCD segment output S27 and SD24_B bit stream clock
46 P3.5/S26 bidirectional General-purpose digital I/O with mappable secondary function; also LCD segment output S26 and SD24_B converter 0 bit stream data
47 P3.6/S25 bidirectional General-purpose digital I/O with mappable secondary function; also LCD segment output S25 and SD24_B converter 1 bit stream data
48 P3.7/S24 bidirectional General-purpose digital I/O with mappable secondary function; also LCD segment output S24 and SD24_B converter 2 bit stream data
49 P4.0/S23 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S23
50 P4.1/S22 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S22
51 P4.2/S21 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S21
52 P4.3/S20 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S20
53 P4.4/S19 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S19
54 P4.5/S18 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S18
55 P4.6/S17 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S17
56 P4.7/S16 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S16
57 P5.0/S15 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S15
58 P5.1/S14 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S14
59 DVSYS power_in Digital power supply for I/Os; must be connected externally
60 DVSS power_in Digital ground supply
61 P5.2/S13 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S13
62 P5.3/S12 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S12
63 P5.4/S11 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S11
64 P5.5/S10 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S10
65 P5.6/S9 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S9
66 P5.7/S8 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S8
67 P6.0/S7 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S7
68 P6.1/S6 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S6
69 P6.2/S5 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S5
70 P6.3/S4 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S4
71 P6.4/S3 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S3
72 P6.5/S2 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S2
73 P6.6/S1 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S1
74 P6.7/S0 bidirectional General-purpose digital I/O without port interrupt; also LCD segment output S0
75 TEST/SBWTCK input Test mode pin for digital I/O selection on JTAG pins; also Spy-Bi-Wire input clock with internal pulldown always enabled
76 PJ.0/SMCLK/TDO output General-purpose digital I/O; also SMCLK clock output and JTAG test data output
77 PJ.1/MCLK/TDI/TCLK input General-purpose digital I/O; also MCLK clock output, JTAG test data input and test clock input
78 PJ.2/ADC10CLK/TMS input General-purpose digital I/O; also ADC10_A clock output and JTAG test mode select input
79 PJ.3/ACLK/TCK input General-purpose digital I/O; also ACLK clock output and JTAG test clock input
80 RST/NMI/SBWTDIO bidirectional Reset input active low with internal pullup and nonmaskable interrupt input; also Spy-Bi-Wire data input/output

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-80(12x12)
Category Embedded Processors & Controllers
Pins 80

CAD (KiCad official)

  • Symbol: MSP430F6736AIPNR
  • Footprint: Package_QFP:LQFP-80_12x12mm_P0.5mm
  • 3D model: LQFP-80(12x12) (KiCad packages3D, STEP)
  • 3D model files: msp430f6736aipnr-etched.step / msp430f6736aipnr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430f6736aipnr.step / msp430f6736aipnr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (168 pp, sha256 9f50329e4202500f, retrieved 2026-09-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF