component
MSP430F5507IRGZR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430F5507IRGZR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · VQFN-48-EP(7x7)
MSP430F5507IRGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P6.0 | bidirectional | General-purpose digital I/O with Schmitt-trigger input; Comparator_B and ADC channel functions not available on RGZ package. |
| 2 | P6.1 | bidirectional | General-purpose digital I/O with Schmitt-trigger input; Comparator_B and ADC channel functions not available on RGZ package. |
| 3 | P6.2 | bidirectional | General-purpose digital I/O with Schmitt-trigger input; Comparator_B and ADC channel functions not available on RGZ package. |
| 4 | P6.3 | bidirectional | General-purpose digital I/O with Schmitt-trigger input; Comparator_B and ADC channel functions not available on RGZ package. |
| 5 | P5.0 | bidirectional | General-purpose digital I/O or external ADC reference input VeREF+ for 10-bit ADC with Schmitt-trigger input. |
| 6 | P5.1 | bidirectional | General-purpose digital I/O or negative external ADC reference input VeREF- for 10-bit ADC with Schmitt-trigger input. |
| 7 | AVCC1 | power_in | Analog power supply, range 1.8V to 3.6V for analog circuits including ADC and reference. |
| 8 | P5.4/XIN | bidirectional | Crystal oscillator XT1 input terminal or general-purpose digital I/O with Schmitt-trigger input. |
| 9 | P5.5/XOUT | bidirectional | Crystal oscillator XT1 output terminal or general-purpose digital I/O with Schmitt-trigger input. |
| 10 | AVSS1 | power_in | Analog ground reference, must be connected to VSS for analog circuit operation. |
| 11 | DVCC1 | power_in | Digital power supply, range 1.8V to 3.6V for digital circuitry and I/O. |
| 12 | DVSS1 | power_in | Digital ground supply, system reference point. |
| 13 | VCORE | power_out | Internal LDO regulated core voltage output for 1.2V core supply; connect only to recommended capacitor (CVCORE), no external current loading. |
| 14 | P1.0/TA0CLK/ACLK | bidirectional | General-purpose digital I/O with port interrupt or Timer_A0 clock input or divided ACLK output with Schmitt-trigger input. |
| 15 | P1.1/TA0.0 | bidirectional | General-purpose digital I/O with port interrupt or Timer_A0 capture/compare output with Schmitt-trigger input. |
| 16 | P1.2/TA0.1 | bidirectional | General-purpose digital I/O with port interrupt or Timer_A0 capture/compare output with Schmitt-trigger input. |
| 17 | P1.3/TA0.2 | bidirectional | General-purpose digital I/O with port interrupt or Timer_A0 capture/compare output with Schmitt-trigger input. |
| 18 | P1.4/TA0.3 | bidirectional | General-purpose digital I/O with port interrupt or Timer_A0 capture/compare output with Schmitt-trigger input. |
| 19 | P1.5/TA0.4 | bidirectional | General-purpose digital I/O with port interrupt or Timer_A0 capture/compare output with Schmitt-trigger input. |
| 20 | P1.6/TA1CLK | bidirectional | General-purpose digital I/O with port interrupt or Timer_A1 clock input with Schmitt-trigger input; Comparator_B output not available on F5507. |
| 21 | P1.7/TA1.0 | bidirectional | General-purpose digital I/O with port interrupt or Timer_A1 capture/compare output with Schmitt-trigger input. |
| 22 | P2.0/TA1.1 | bidirectional | General-purpose digital I/O with port interrupt or Timer_A1 capture/compare output with Schmitt-trigger input. |
| 23 | PJ.0/TDO | bidirectional | General-purpose digital I/O or JTAG test data output with Schmitt-trigger input and high-drive strength. |
| 24 | PJ.1/TDI/TCLK | bidirectional | General-purpose digital I/O or JTAG test data input and test clock input with Schmitt-trigger input and internal pullup. |
| 25 | PJ.2/TMS | bidirectional | General-purpose digital I/O or JTAG test mode select with Schmitt-trigger input and internal pullup. |
| 26 | PJ.3/TCK | bidirectional | General-purpose digital I/O or JTAG test clock input with Schmitt-trigger input and internal pullup. |
| 27 | DVSS2 | power_in | Digital ground supply, system reference point. |
| 28 | DVCC2 | power_in | Digital power supply, range 1.8V to 3.6V for USB PHY and digital circuitry. |
| 29 | P4.0 | bidirectional | General-purpose digital I/O with reconfigurable port mapping for USCI_B1 SPI slave transmit enable or USCI_A1 clock signal with Schmitt-trigger input. |
| 30 | P4.1 | bidirectional | General-purpose digital I/O with reconfigurable port mapping for USCI_B1 SPI slave in master out or I2C data line with Schmitt-trigger input. |
| 31 | P4.2 | bidirectional | General-purpose digital I/O with reconfigurable port mapping for USCI_B1 SPI slave out master in or I2C clock line with Schmitt-trigger input. |
| 32 | P4.3 | bidirectional | General-purpose digital I/O with reconfigurable port mapping for USCI_B1 or USCI_A1 clock signal with Schmitt-trigger input. |
| 33 | P4.4 | bidirectional | General-purpose digital I/O with reconfigurable port mapping for USCI_A1 transmit data or SPI slave in master out with Schmitt-trigger input. |
| 34 | P4.5 | bidirectional | General-purpose digital I/O with reconfigurable port mapping for USCI_A1 receive data or SPI slave out master in with Schmitt-trigger input. |
| 35 | P4.6 | bidirectional | General-purpose digital I/O with reconfigurable port mapping and Schmitt-trigger input; no secondary function mapped by default. |
| 36 | P4.7 | bidirectional | General-purpose digital I/O with reconfigurable port mapping and Schmitt-trigger input; no secondary function mapped by default. |
| 37 | VSSU | power_in | USB PHY ground supply, must be connected to VSS for USB operation. |
| 38 | PU.0/DP | bidirectional | USB data terminal DP line or general-purpose digital I/O controlled by USB control register. |
| 39 | PUR | tri_state | USB pullup resistor pin (open-drain output); voltage level used to detect USB boot loader mode with recommended 1-MΩ resistor to ground. |
| 40 | PU.1/DM | bidirectional | USB data terminal DM line or general-purpose digital I/O controlled by USB control register. |
| 41 | VBUS | power_in | USB power input to integrated LDO, range 4.4V to 5.25V from USB host. |
| 42 | VUSB | power_out | Integrated USB LDO regulated 3.3V output for USB transceiver and external circuits. |
| 43 | V18 | power_out | Internal USB LDO regulated 1.8V output for internal use only; no external current loading. |
| 44 | AVSS2 | power_in | Analog ground reference, must be connected to VSS for USB PHY analog circuits. |
| 45 | P5.2/XT2IN | bidirectional | Crystal oscillator XT2 input terminal or general-purpose digital I/O with Schmitt-trigger input. |
| 46 | P5.3/XT2OUT | bidirectional | Crystal oscillator XT2 output terminal or general-purpose digital I/O with Schmitt-trigger input. |
| 47 | TEST/SBWTCK | input | Test mode pin to select JTAG pins as digital I/O or Spy-By-Wire clock input for in-system programming. |
| 48 | RST/NMI/SBWTDIO | bidirectional | Reset input (active-low) with internal pullup, nonmaskable interrupt input, or Spy-By-Wire bidirectional data line for in-system programming. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-48-EP(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
MSP430F5507IRGZR - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files:
msp430f5507irgzr-etched.step/msp430f5507irgzr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430f5507irgzr.step/msp430f5507irgzr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (134 pp, sha256
39e075da0f1e3944, retrieved 2026-10-06, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).