component

MSP430F5502IRGZR

Public Made by Adom

by adom

Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersmsp430f5502irgzrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 1d ago
viewers msp430f5502irgzr: viewers · Ray 1d ago
msp430f5502irgzr-etched.glb msp430f5502irgzr: factory component page (tier=lcsc) · Ray 1d ago
msp430f5502irgzr-etched.step msp430f5502irgzr: factory component page (tier=lcsc) · Ray 1d ago
msp430f5502irgzr-hero.glb Publish 0.1.0 · Ray 1d ago
msp430f5502irgzr-hero.overlay.json Publish 0.1.0 · Ray 1d ago
msp430f5502irgzr.glb Publish 0.1.0 · Ray 1d ago
msp430f5502irgzr.kicad_mod Publish 0.1.0 · Ray 1d ago
msp430f5502irgzr.kicad_sym Publish 0.1.0 · Ray 1d ago
msp430f5502irgzr.lbr Publish 0.1.0 · Ray 1d ago
msp430f5502irgzr.step Publish 0.1.0 · Ray 1d ago
package.json Publish 0.1.0 · Ray 1d ago
page.json Set visibility: public · Ray 1d ago
README.md Initial commit: component/msp430f5502irgzr · Ray 1d ago

MSP430F5502IRGZR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · VQFN-48-EP(7x7)

MSP430F5502IRGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P6.0/CB0 bidirectional General-purpose I/O with Comparator_B input CB0
2 P6.1/CB1 bidirectional General-purpose I/O with Comparator_B input CB1
3 P6.2/CB2 bidirectional General-purpose I/O with Comparator_B input CB2
4 P6.3/CB3 bidirectional General-purpose I/O with Comparator_B input CB3
5 P5.0 bidirectional General-purpose I/O
6 P5.1 bidirectional General-purpose I/O
7 AVCC1 power_in Analog power supply 1.8V to 3.6V
8 P5.4/XIN bidirectional General-purpose I/O and XT1 (32kHz) crystal oscillator input
9 P5.5/XOUT bidirectional General-purpose I/O and XT1 (32kHz) crystal oscillator output
10 AVSS1 power_in Analog ground supply 0V reference
11 DVCC1 power_in Digital power supply 1.8V to 3.6V
12 DVSS1 power_in Digital ground supply 0V reference
13 VCORE power_out Regulated core supply output for internal use only, requires external capacitor per datasheet
14 P1.0/TA0CLK/ACLK bidirectional General-purpose I/O with port interrupt, TA0 clock input, ACLK output
15 P1.1/TA0.0 bidirectional General-purpose I/O with port interrupt, Timer_A0 CCR0 capture/compare output
16 P1.2/TA0.1 bidirectional General-purpose I/O with port interrupt, Timer_A0 CCR1 capture/compare output
17 P1.3/TA0.2 bidirectional General-purpose I/O with port interrupt, Timer_A0 CCR2 capture/compare output
18 P1.4/TA0.3 bidirectional General-purpose I/O with port interrupt, Timer_A0 CCR3 capture/compare output
19 P1.5/TA0.4 bidirectional General-purpose I/O with port interrupt, Timer_A0 CCR4 capture/compare output
20 P1.6/TA1CLK/CBOUT bidirectional General-purpose I/O with port interrupt, TA1 clock input, Comparator_B output
21 P1.7/TA1.0 bidirectional General-purpose I/O with port interrupt, Timer_A1 CCR0 capture/compare output
22 P2.0/TA1.1 bidirectional General-purpose I/O with port interrupt, Timer_A1 CCR1 capture/compare output
23 PJ.0/TDO bidirectional General-purpose I/O and JTAG test data output
24 PJ.1/TDI/TCLK bidirectional General-purpose I/O, JTAG test data input and test clock input
25 PJ.2/TMS bidirectional General-purpose I/O and JTAG test mode select
26 PJ.3/TCK bidirectional General-purpose I/O and JTAG test clock input
27 DVSS2 power_in Digital ground supply 0V reference
28 DVCC2 power_in Digital power supply 1.8V to 3.6V
29 P4.0/PM_UCB1STE/PM_UCA1CLK bidirectional General-purpose I/O with reconfigurable port mapping, USCI_B1 SPI slave transmit enable or USCI_A1 clock
30 P4.1/PM_UCB1SIMO/PM_UCB1SDA bidirectional General-purpose I/O with reconfigurable port mapping, USCI_B1 SPI/I2C data
31 P4.2/PM_UCB1SOMI/PM_UCB1SCL bidirectional General-purpose I/O with reconfigurable port mapping, USCI_B1 SPI/I2C clock
32 P4.3/PM_UCB1CLK/PM_UCA1STE bidirectional General-purpose I/O with reconfigurable port mapping, USCI_B1/A1 clock and control
33 P4.4/PM_UCA1TXD/PM_UCA1SIMO bidirectional General-purpose I/O with reconfigurable port mapping, USCI_A1 UART transmit or SPI data output
34 P4.5/PM_UCA1RXD/PM_UCA1SOMI bidirectional General-purpose I/O with reconfigurable port mapping, USCI_A1 UART receive or SPI data input
35 P4.6/PM_NONE bidirectional General-purpose I/O with reconfigurable port mapping, no default secondary function
36 P4.7/PM_NONE bidirectional General-purpose I/O with reconfigurable port mapping, no default secondary function
37 VSSU power_in USB PHY ground supply 0V reference
38 PU.0/DP bidirectional General-purpose I/O controlled by USB module and USB DP (D+) data terminal
39 PUR tri_state USB pullup resistor control pin (open-drain output), 1MΩ to ground recommended
40 PU.1/DM bidirectional General-purpose I/O controlled by USB module and USB DM (D-) data terminal
41 VBUS power_in USB LDO input from USB power source, connect to 5V supply
42 VUSB power_out USB LDO 3.3V regulated output supply
43 V18 power_out USB 1.8V regulated supply for internal use only, no external current loading
44 AVSS2 power_in Analog ground supply 0V reference
45 P5.2/XT2IN bidirectional General-purpose I/O and XT2 high-frequency (up to 32MHz) oscillator input
46 P5.3/XT2OUT bidirectional General-purpose I/O and XT2 high-frequency (up to 32MHz) oscillator output
47 TEST/SBWTCK input Test mode pin to enable JTAG interface and Spy-Bi-Wire clock input for programming
48 RST/NMI/SBWTDIO bidirectional Reset input (active low) with internal pullup, nonmaskable interrupt input, Spy-Bi-Wire data I/O
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-48-EP(7x7)
Category Embedded Processors & Controllers
Pins 49

CAD (KiCad official)

  • Symbol: MSP430F5502IRGZR
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
  • 3D model files: msp430f5502irgzr-etched.step / msp430f5502irgzr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430f5502irgzr.step / msp430f5502irgzr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (134 pp, sha256 39e075da0f1e3944, retrieved 2026-10-07, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF