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Ray Initial commit: component/msp430f5438ipzr 07389cf 3d ago

MSP430F5438IPZR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

MSP430F5438IPZR from Texas Instruments, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P6.4/A4 bidirectional General-purpose digital I/O or analog input A4 for the ADC.
2 P6.5/A5 bidirectional General-purpose digital I/O or analog input A5 for the ADC.
3 P6.6/A6 bidirectional General-purpose digital I/O or analog input A6 for the ADC.
4 P6.7/A7 bidirectional General-purpose digital I/O or analog input A7 for the ADC.
5 P7.4/A12 bidirectional General-purpose digital I/O or analog input A12 for the ADC.
6 P7.5/A13 bidirectional General-purpose digital I/O or analog input A13 for the ADC.
7 P7.6/A14 bidirectional General-purpose digital I/O or analog input A14 for the ADC.
8 P7.7/A15 bidirectional General-purpose digital I/O or analog input A15 for the ADC.
9 P5.0/A8/VREF+/VeREF+ bidirectional General-purpose digital I/O, analog input A8, ADC reference voltage output, or external reference voltage input to the ADC.
10 P5.1/A9/VREF-/VeREF- bidirectional General-purpose digital I/O, analog input A9, or negative terminal for the ADC internal or external reference voltage.
11 AVCC power_in Analog power supply.
12 AVSS power_in Analog ground supply.
13 P7.0/XIN bidirectional General-purpose digital I/O or input terminal for crystal oscillator XT1.
14 P7.1/XOUT bidirectional General-purpose digital I/O or output terminal of crystal oscillator XT1.
15 DVSS1 power_in Digital ground supply.
16 DVCC1 power_in Digital power supply.
17 P1.0/TA0CLK/ACLK bidirectional General-purpose digital I/O with port interrupt, TA0 clock input, or ACLK output (divided by 1, 2, 4, 8, 16, or 32).
18 P1.1/TA0.0 bidirectional General-purpose digital I/O with port interrupt, TA0 CCR0 capture input/compare output, or BSL transmit output.
19 P1.2/TA0.1 bidirectional General-purpose digital I/O with port interrupt, TA0 CCR1 capture input/compare output, or BSL receive input.
20 P1.3/TA0.2 bidirectional General-purpose digital I/O with port interrupt, or TA0 CCR2 capture input (CCI2A) / compare output.
21 P1.4/TA0.3 bidirectional General-purpose digital I/O with port interrupt, or TA0 CCR3 capture input (CCI3A) / compare output.
22 P1.5/TA0.4 bidirectional General-purpose digital I/O with port interrupt, or TA0 CCR4 capture input (CCI4A) / compare output.
23 P1.6/SMCLK bidirectional General-purpose digital I/O with port interrupt, or SMCLK output.
24 P1.7 bidirectional General-purpose digital I/O with port interrupt.
25 P2.0/TA1CLK/MCLK bidirectional General-purpose digital I/O with port interrupt, TA1 clock input, or MCLK output.
26 P2.1/TA1.0 bidirectional General-purpose digital I/O with port interrupt, or TA1 CCR0 capture input (CCI0A) / compare output.
27 P2.2/TA1.1 bidirectional General-purpose digital I/O with port interrupt, or TA1 CCR1 capture input (CCI1A) / compare output.
28 P2.3/TA1.2 bidirectional General-purpose digital I/O with port interrupt, or TA1 CCR2 capture input (CCI2A) / compare output.
29 P2.4/RTCCLK bidirectional General-purpose digital I/O with port interrupt, or RTCCLK output.
30 P2.5 bidirectional General-purpose digital I/O with port interrupt.
31 P2.6/ACLK bidirectional General-purpose digital I/O with port interrupt, or ACLK output.
32 P2.7/ADC12CLK/DMAE0 bidirectional General-purpose digital I/O with port interrupt, DMA external trigger input (DMAE0), or ADC12CLK output.
33 P3.0/UCB0STE/UCA0CLK bidirectional General-purpose digital I/O, or USCI_B0 slave transmit enable / USCI_A0 clock.
34 P3.1/UCB0SIMO/UCB0SDA bidirectional General-purpose digital I/O, or USCI_B0 SPI SIMO / I2C data (I2C output drives only logical 0 to VSS).
35 P3.2/UCB0SOMI/UCB0SCL bidirectional General-purpose digital I/O, or USCI_B0 SPI SOMI / I2C clock (I2C output drives only logical 0 to VSS).
36 P3.3/UCB0CLK/UCA0STE bidirectional General-purpose digital I/O, or USCI_B0 clock / USCI_A0 slave transmit enable.
37 DVSS3 power_in Digital ground supply.
38 DVCC3 power_in Digital power supply.
39 P3.4/UCA0TXD/UCA0SIMO bidirectional General-purpose digital I/O, or USCI_A0 UART transmit / SPI SIMO.
40 P3.5/UCA0RXD/UCA0SOMI bidirectional General-purpose digital I/O, or USCI_A0 UART receive / SPI SOMI.
41 P3.6/UCB1STE/UCA1CLK bidirectional General-purpose digital I/O, or USCI_B1 slave transmit enable / USCI_A1 clock.
42 P3.7/UCB1SIMO/UCB1SDA bidirectional General-purpose digital I/O, or USCI_B1 SPI SIMO / I2C data (I2C output drives only logical 0 to VSS).
43 P4.0/TB0.0 bidirectional General-purpose digital I/O, or TB0 CCR0 capture input / compare output.
44 P4.1/TB0.1 bidirectional General-purpose digital I/O, or TB0 CCR1 capture input / compare output.
45 P4.2/TB0.2 bidirectional General-purpose digital I/O, or TB0 CCR2 capture input / compare output.
46 P4.3/TB0.3 bidirectional General-purpose digital I/O, or TB0 CCR3 capture input / compare output.
47 P4.4/TB0.4 bidirectional General-purpose digital I/O, or TB0 CCR4 capture input / compare output.
48 P4.5/TB0.5 bidirectional General-purpose digital I/O, or TB0 CCR5 capture input / compare output.
49 P4.6/TB0.6 bidirectional General-purpose digital I/O, or TB0 CCR6 capture input / compare output.
50 P4.7/TB0CLK/SMCLK bidirectional General-purpose digital I/O, TB0 clock input, or SMCLK output.
51 P5.4/UCB1SOMI/UCB1SCL bidirectional General-purpose digital I/O, or USCI_B1 SPI SOMI / I2C clock (I2C output drives only logical 0 to VSS).
52 P5.5/UCB1CLK/UCA1STE bidirectional General-purpose digital I/O, or USCI_B1 clock / USCI_A1 slave transmit enable.
53 P5.6/UCA1TXD/UCA1SIMO bidirectional General-purpose digital I/O, or USCI_A1 UART transmit / SPI SIMO.
54 P5.7/UCA1RXD/UCA1SOMI bidirectional General-purpose digital I/O, or USCI_A1 UART receive / SPI SOMI.
55 P7.2/TB0OUTH/SVMOUT bidirectional General-purpose digital I/O, TB0OUTH input (sets all Timer_B outputs to high impedance), or SVMOUT output.
56 P7.3/TA1.2 bidirectional General-purpose digital I/O, or TA1 CCR2 capture input (CCI2B) / compare output.
57 P8.0/TA0.0 bidirectional General-purpose digital I/O, or TA0 CCR0 capture input (CCI0B) / compare output.
58 P8.1/TA0.1 bidirectional General-purpose digital I/O, or TA0 CCR1 capture input (CCI1B) / compare output.
59 P8.2/TA0.2 bidirectional General-purpose digital I/O, or TA0 CCR2 capture input (CCI2B) / compare output.
60 P8.3/TA0.3 bidirectional General-purpose digital I/O, or TA0 CCR3 capture input (CCI3B) / compare output.
61 P8.4/TA0.4 bidirectional General-purpose digital I/O, or TA0 CCR4 capture input (CCI4B) / compare output.
62 VCORE power_in Pin named VCORE in the pin diagram; the datasheet text provided gives no further description of it.
63 DVSS2 power_in Digital ground supply.
64 DVCC2 power_in Digital power supply.
65 P8.5/TA1.0 bidirectional General-purpose digital I/O, or TA1 CCR0 capture input (CCI0B) / compare output.
66 P8.6/TA1.1 bidirectional General-purpose digital I/O, or TA1 CCR1 capture input (CCI1B) / compare output.
67 P8.7 bidirectional General-purpose digital I/O.
68 P9.0/UCB2STE/UCA2CLK bidirectional General-purpose digital I/O, or USCI_B2 slave transmit enable / USCI_A2 clock.
69 P9.1/UCB2SIMO/UCB2SDA bidirectional General-purpose digital I/O, or USCI_B2 SPI SIMO / I2C data (I2C output drives only logical 0 to VSS).
70 P9.2/UCB2SOMI/UCB2SCL bidirectional General-purpose digital I/O, or USCI_B2 SPI SOMI / I2C clock (I2C output drives only logical 0 to VSS).
71 P9.3/UCB2CLK/UCA2STE bidirectional General-purpose digital I/O, or USCI_B2 clock / USCI_A2 slave transmit enable.
72 P9.4/UCA2TXD/UCA2SIMO bidirectional General-purpose digital I/O, or USCI_A2 UART transmit / SPI SIMO.
73 P9.5/UCA2RXD/UCA2SOMI bidirectional General-purpose digital I/O, or USCI_A2 UART receive / SPI SOMI.
74 P9.6 bidirectional General-purpose digital I/O.
75 P9.7 bidirectional General-purpose digital I/O.
76 P10.0/UCB3STE/UCA3CLK bidirectional General-purpose digital I/O, or USCI_B3 slave transmit enable / USCI_A3 clock.
77 P10.1/UCB3SIMO/UCB3SDA bidirectional General-purpose digital I/O, or USCI_B3 SPI SIMO / I2C data (I2C output drives only logical 0 to VSS).
78 P10.2/UCB3SOMI/UCB3SCL bidirectional General-purpose digital I/O, or USCI_B3 SPI SOMI / I2C clock (I2C output drives only logical 0 to VSS).
79 P10.3/UCB3CLK/UCA3STE bidirectional General-purpose digital I/O, or USCI_B3 clock / USCI_A3 slave transmit enable.
80 P10.4/UCA3TXD/UCA3SIMO bidirectional General-purpose digital I/O, or USCI_A3 UART transmit / SPI SIMO.
81 P10.5/UCA3RXD/UCA3SOMI bidirectional General-purpose digital I/O, or USCI_A3 UART receive / SPI SOMI.
82 P10.6 bidirectional General-purpose digital I/O; secondary function is reserved for factory test, keep P10SEL.6 cleared.
83 P10.7 bidirectional General-purpose digital I/O; secondary function is reserved for factory test, keep P10SEL.7 cleared.
84 P11.0/ACLK bidirectional General-purpose digital I/O, or ACLK output.
85 P11.1/MCLK bidirectional General-purpose digital I/O, or MCLK output.
86 P11.2/SMCLK bidirectional General-purpose digital I/O, or SMCLK output.
87 DVCC4 power_in Digital power supply.
88 DVSS4 power_in Digital ground supply.
89 P5.2/XT2IN bidirectional General-purpose digital I/O, or input terminal for crystal oscillator XT2 (crystal or bypass mode).
90 P5.3/XT2OUT bidirectional General-purpose digital I/O, or output terminal of crystal oscillator XT2 (usable as I/O in bypass mode).
91 TEST/SBWTCK input Test mode pin and Spy-Bi-Wire clock input.
92 PJ.0/TDO bidirectional General-purpose digital I/O or JTAG test data output.
93 PJ.1/TDI/TCLK bidirectional General-purpose digital I/O or JTAG test data input / test clock input (pullup activated automatically in JTAG mode).
94 PJ.2/TMS bidirectional General-purpose digital I/O or JTAG test mode select (pullup activated automatically in JTAG mode).
95 PJ.3/TCK bidirectional General-purpose digital I/O or JTAG test clock (pullup activated automatically in JTAG mode).
96 RST/NMI/SBWTDIO bidirectional Reset input, nonmaskable interrupt input, and Spy-Bi-Wire data input/output.
97 P6.0/A0 bidirectional General-purpose digital I/O or analog input A0 for the ADC.
98 P6.1/A1 bidirectional General-purpose digital I/O or analog input A1 for the ADC.
99 P6.2/A2 bidirectional General-purpose digital I/O or analog input A2 for the ADC.
100 P6.3/A3 bidirectional General-purpose digital I/O or analog input A3 for the ADC.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: MSP430F5438IPZR
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: msp430f5438ipzr-etched.step / msp430f5438ipzr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430f5438ipzr.step / msp430f5438ipzr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (114 pp, sha256 a2c6502be83bd424, retrieved 2026-10-03, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF