component
MSP430F5255IRGCR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "msp430f5255irgcr",
"title": "MSP430F5255IRGCR",
"brief": "Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"embedded processors & controllers",
"msp430f5255irgcr",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "MSP430F5255IRGCR",
"manufacturer": "Texas Instruments",
"package": "VQFN-64-EP(9x9)",
"pin_count": 65,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://www.ti.com/cn/lit/gpn/msp430f5257",
"parts": {
"symbol": "msp430f5255irgcr.kicad_sym",
"footprint": "msp430f5255irgcr.kicad_mod",
"model_3d": "msp430f5255irgcr-hero.glb",
"model_3d_plain": "msp430f5255irgcr.glb",
"model_3d_step": "msp430f5255irgcr-etched.step",
"model_3d_step_plain": "msp430f5255irgcr.step",
"lbr": "msp430f5255irgcr.lbr"
},
"distributor_links": {
"lcsc": "C2862073",
"digikey": "296-40410-2-ND",
"mouser": "595-MSP430F5255IRGCR"
},
"distributor_check": {
"checked_at": "2026-10-08T16:24:56Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-40410-2-ND",
"status": "found"
},
"mouser": {
"pn": "595-MSP430F5255IRGCR",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "P6.0/TA2CLK/SMCLK/CB0/A0",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain with port interrupt, also TA2 clock input, SMCLK output, Comparator_B input CB0 and ADC analog input A0."
},
{
"number": "2",
"name": "P6.1/TA2.0/CB1/A1",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain with port interrupt, also TA2 CCR0 capture/compare output, Comparator_B input CB1, ADC analog input A1 and BSL transmit output."
},
{
"number": "3",
"name": "P6.2/TA2.1/CB2/A2",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain with port interrupt, also TA2 CCR1 capture/compare output, Comparator_B input CB2, ADC analog input A2 and BSL receive input."
},
{
"number": "4",
"name": "P6.3/TA2.2/CB3/A3",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain with port interrupt, also TA2 CCR2 capture/compare output, Comparator_B input CB3 and ADC analog input A3."
},
{
"number": "5",
"name": "P6.4/CB4/A4",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain with port interrupt, also Comparator_B input CB4 and ADC analog input A4."
},
{
"number": "6",
"name": "P6.5/CB5/A5",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain with port interrupt, also Comparator_B input CB5 and ADC analog input A5."
},
{
"number": "7",
"name": "P6.6/CB6/A6",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain with port interrupt, also Comparator_B input CB6 and ADC analog input A6."
},
{
"number": "8",
"name": "P6.7/CB7/A7",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain with port interrupt, also Comparator_B input CB7 and ADC analog input A7."
},
{
"number": "9",
"name": "P5.0/A8/VeREF+",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain, also ADC analog input A8 and external ADC reference voltage input VeREF+ (not available on all device types)."
},
{
"number": "10",
"name": "P5.1/A9/VeREF-",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain, also ADC analog input A9 and negative terminal for an externally applied ADC reference voltage VeREF- (not available on all device types)."
},
{
"number": "11",
"name": "AVCC",
"type": "power_in",
"description": "Analog power supply."
},
{
"number": "12",
"name": "P5.4/XIN",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain, also input terminal for crystal oscillator XT1 (in bypass mode XIN can take a digital waveform from DVSS to DVCC or DVSS to DVIO)."
},
{
"number": "13",
"name": "P5.5/XOUT",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain, also output terminal of crystal oscillator XT1."
},
{
"number": "14",
"name": "AVSS",
"type": "power_in",
"description": "Analog ground supply."
},
{
"number": "15",
"name": "DVCC",
"type": "power_in",
"description": "Digital power supply."
},
{
"number": "16",
"name": "DVSS",
"type": "power_in",
"description": "Digital ground supply."
},
{
"number": "17",
"name": "VCORE",
"type": "power_out",
"description": "Regulated core power supply output for internal use only; no external current loading is possible and only the recommended capacitor CVCORE should be connected."
},
{
"number": "18",
"name": "P1.0/TA0CLK/ACLK",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with port interrupt, also TA0 clock input and ACLK output (divided by 1, 2, 4, 8, 16 or 32)."
},
{
"number": "19",
"name": "P1.1/TA0.0",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with port interrupt, also TA0 CCR0 capture input CCI0A and compare output Out0."
},
{
"number": "20",
"name": "P1.2/TA0.1",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with port interrupt, also TA0 CCR1 capture input CCI1A and compare output Out1."
},
{
"number": "21",
"name": "P1.3/TA0.2",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with port interrupt, also TA0 CCR2 capture input CCI2A and compare output Out2."
},
{
"number": "22",
"name": "P1.4/TA0.3",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with port interrupt, also TA0 CCR3 capture input CCI3A and compare output Out3."
},
{
"number": "23",
"name": "P1.5/TA0.4",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with port interrupt, also TA0 CCR4 capture input CCI4A and compare output Out4."
},
{
"number": "24",
"name": "P1.6/TA1CLK/CBOUT",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with port interrupt, also TA1 clock input and Comparator_B output."
},
{
"number": "25",
"name": "P1.7/TA1.0",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with port interrupt, also TA1 CCR0 capture input CCI0A and compare output Out0."
},
{
"number": "26",
"name": "P2.0/TA1.1",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with port interrupt, also TA1 CCR1 capture input CCI1A and compare output Out1."
},
{
"number": "27",
"name": "P2.1/TA1.2",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with port interrupt, also TA1 CCR2 capture input CCI2A and compare output Out2."
},
{
"number": "28",
"name": "P2.2/UCB3SIMO/UCB3SDA",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with port interrupt, also USCI_B3 SPI slave-in/master-out or I2C data (USCI_B3)."
},
{
"number": "29",
"name": "P2.3/UCB3SOMI/UCB3SCL",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with port interrupt, also USCI_B3 SPI slave-out/master-in or I2C clock (USCI_B3)."
},
{
"number": "30",
"name": "P2.4/UCB3CLK/UCA3STE",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with port interrupt, also USCI_B3 SPI clock input (slave) or output (master) and USCI_A3 SPI slave transmit enable."
},
{
"number": "31",
"name": "P2.5/UCB3STE/UCA3CLK",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with port interrupt, also USCI_B3 SPI slave transmit enable and USCI_A3 SPI clock input (slave) or output (master)."
},
{
"number": "32",
"name": "P2.6/RTCCLK/DMAE0",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with port interrupt, also RTC clock output for calibration and DMA external trigger input."
},
{
"number": "33",
"name": "P2.7/UCB0STE/UCA0CLK",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain, also USCI_B0 SPI slave transmit enable and USCI_A0 SPI clock input (slave) or output (master)."
},
{
"number": "34",
"name": "P3.0/UCB0SIMO/UCB0SDA",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain, also USCI_B0 SPI slave-in/master-out or I2C data."
},
{
"number": "35",
"name": "P3.1/UCB0SOMI/UCB0SCL",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain, also USCI_B0 SPI slave-out/master-in or I2C clock."
},
{
"number": "36",
"name": "P3.2/UCB0CLK/UCA0STE",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain, also USCI_B0 SPI clock input (slave) or output (master) and USCI_A0 SPI slave transmit enable."
},
{
"number": "37",
"name": "P3.3/UCA0TXD/UCA0SIMO",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain, also USCI_A0 UART transmit data or SPI slave-in/master-out."
},
{
"number": "38",
"name": "P3.4/UCA0RXD/UCA0SOMI",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain, also USCI_A0 UART receive data or SPI slave-out/master-in."
},
{
"number": "39",
"name": "DVSS",
"type": "power_in",
"description": "Digital ground supply for the DVIO domain."
},
{
"number": "40",
"name": "DVIO",
"type": "power_in",
"description": "Digital I/O power supply for the DVIO domain; the voltage on DVIO is not supervised or monitored."
},
{
"number": "41",
"name": "P4.0/PM_UCB1STE/PM_UCA1CLK",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with reconfigurable port mapping; default mapping is USCI_B1 SPI slave transmit enable or USCI_A1 clock input/output."
},
{
"number": "42",
"name": "P4.1/PM_UCB1SIMO/PM_UCB1SDA",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with reconfigurable port mapping; default mapping is USCI_B1 SPI slave-in/master-out or I2C data."
},
{
"number": "43",
"name": "P4.2/PM_UCB1SOMI/PM_UCB1SCL",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with reconfigurable port mapping; default mapping is USCI_B1 SPI slave-out/master-in or I2C clock."
},
{
"number": "44",
"name": "P4.3/PM_UCB1CLK/PM_UCA1STE",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with reconfigurable port mapping; default mapping is USCI_B1 SPI clock or USCI_A1 SPI slave transmit enable."
},
{
"number": "45",
"name": "P4.4/PM_UCA1TXD/PM_UCA1SIMO",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with reconfigurable port mapping; default mapping is USCI_A1 UART transmit data or SPI slave-in/master-out."
},
{
"number": "46",
"name": "P4.5/PM_UCA1RXD/PM_UCA1SOMI",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with reconfigurable port mapping; default mapping is USCI_A1 UART receive data or SPI slave-out/master-in."
},
{
"number": "47",
"name": "P4.6/PM_UCA3TXD/PM_UCA3SIMO",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with reconfigurable port mapping; default mapping is USCI_A3 UART transmit data or SPI slave-in/master-out."
},
{
"number": "48",
"name": "P4.7/PM_UCA3RXD/PM_UCA3SOMI",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain with reconfigurable port mapping; default mapping is USCI_A3 UART receive data or SPI slave-out/master-in."
},
{
"number": "49",
"name": "P7.0/UCA2TXD/UCA2SIMO",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain, also USCI_A2 UART transmit data or SPI slave-in/master-out."
},
{
"number": "50",
"name": "P7.1/UCA2RXD/UCA2SOMI",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain, also USCI_A2 UART receive data or SPI slave-out/master-in."
},
{
"number": "51",
"name": "P7.2/UCB2CLK/UCA2STE",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain, also USCI_B2 SPI clock input (slave) or output (master) and USCI_A2 SPI slave transmit enable."
},
{
"number": "52",
"name": "P7.3/UCB2SIMO/UCB2SDA",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain, also USCI_B2 SPI slave-in/master-out or I2C data."
},
{
"number": "53",
"name": "P7.4/UCB2SOMI/UCB2SCL",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain, also USCI_B2 SPI slave-out/master-in or I2C clock."
},
{
"number": "54",
"name": "P7.5/UCB2STE/UCA2CLK",
"type": "bidirectional",
"description": "General-purpose I/O on the DVIO domain, also USCI_B2 SPI slave transmit enable and USCI_A2 SPI clock input (slave) or output (master)."
},
{
"number": "55",
"name": "BSLEN",
"type": "input",
"description": "BSL enable input on the DVIO domain with internal pulldown; used together with RST/NMI for the DVIO-domain bootloader entry sequence."
},
{
"number": "56",
"name": "RST/NMI",
"type": "input",
"description": "Active-low reset input or nonmaskable interrupt input on the DVIO domain; when driven externally, input swing from DVSS to DVIO is required and the internal pullup is enabled by default when configured as reset."
},
{
"number": "57",
"name": "P5.2/XT2IN",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain, also input terminal for crystal oscillator XT2 (in bypass mode it can take a digital waveform from DVSS to DVCC or DVSS to DVIO)."
},
{
"number": "58",
"name": "P5.3/XT2OUT",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain, also output terminal of crystal oscillator XT2."
},
{
"number": "59",
"name": "TEST/SBWTCK",
"type": "input",
"description": "Test mode pin that selects four-wire JTAG operation on the DVCC domain, and Spy-Bi-Wire input clock when Spy-Bi-Wire is active."
},
{
"number": "60",
"name": "PJ.0/TDO",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain, also JTAG test data output port."
},
{
"number": "61",
"name": "PJ.1/TDI/TCLK",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain, also JTAG test data input or test clock input."
},
{
"number": "62",
"name": "PJ.2/TMS",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain, also JTAG test mode select."
},
{
"number": "63",
"name": "PJ.3/TCK",
"type": "bidirectional",
"description": "General-purpose I/O on the DVCC domain, also JTAG test clock."
},
{
"number": "64",
"name": "RSTDVCC/SBWTDIO",
"type": "bidirectional",
"description": "Nonconfigurable active-low reset input on the DVCC domain with internal pullup to DVCC (external drive requires swing from DVSS to DVCC), also Spy-Bi-Wire data input/output."
},
{
"number": "65",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The QFN exposed thermal pad is listed in Table 7-1 as 'Pad' with no pin number (N/A). It is not a nu; Figure 7-1 places a 'Supplied by DVIO' legend near the top of the RGC drawing, but Table 7-1 lists p; Table 7-1 footnote (13) lists reserved C6, D4-D6, E3-E6, F3-F8, G3 for the 80-pin ZXH/ZQE package on",
"exposed pad 65 added from the footprint"
],
"pages_sent": 46,
"cost_usd": 0.3096,
"at": "2026-10-08T16:24:36"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/msp430f5257",
"pages": 112,
"sha256": "52c9555dc979ab2f",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 65,
"described": 65,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"footprint": "viewers/footprint.html"
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"models_3d": [
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"up": "Z",
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"extents_mm": [
9,
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"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "msp430f5255irgcr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "a3d43ab182f670edb59e62ee31ae443adef32ca54be5b2e496fa19b07feeb258",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "VQFN-64-EP(9x9)",
"Category": "Embedded Processors & Controllers",
"Pins": "65"
}
},
"variants": [],
"sections": [
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"discovery_triggers": [
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"discovery_pitch": "MSP430F5255IRGCR (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
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