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MSP430F5247IRGCR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-64(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+102@@ -0,0 +1,102 @@+# MSP430F5247IRGCR++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · VQFN-64(9x9)++MSP430F5247IRGCR from Texas Instruments, in a VQFN-64(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | P6.0/A0/CB0 | bidirectional | General-purpose digital I/O P6.0, also ADC10 analog input A0 and Comparator_B input CB0, where selecting CB0 disables the pin's output driver and input buffer. |+| 2 | P6.1/A1/CB1 | bidirectional | General-purpose digital I/O P6.1, also ADC10 analog input A1 and Comparator_B input CB1, where selecting CB1 disables the pin's output driver and input buffer. |+| 3 | P6.2/A2/CB2 | bidirectional | General-purpose digital I/O P6.2, also ADC10 analog input A2 and Comparator_B input CB2, where selecting CB2 disables the pin's output driver and input buffer. |+| 4 | P6.3/A3/CB3 | bidirectional | General-purpose digital I/O P6.3, also ADC10 analog input A3 and Comparator_B input CB3, where selecting CB3 disables the pin's output driver and input buffer. |+| 5 | P6.4/CB4/A4 | bidirectional | General-purpose digital I/O; Comparator_B input CB4 and analog input A4 for the ADC. |+| 6 | P6.5/CB5/A5 | bidirectional | General-purpose digital I/O; Comparator_B input CB5 and analog input A5 for the ADC. |+| 7 | P6.6/CB6/A6 | bidirectional | General-purpose digital I/O; Comparator_B input CB6 and analog input A6 for the ADC. |+| 8 | P6.7/CB7/A7 | bidirectional | General-purpose digital I/O; Comparator_B input CB7 and analog input A7 for the ADC. |+| 9 | P5.0/A8/VeREF+ | bidirectional | General-purpose digital I/O; analog input A8 and input for an external ADC reference voltage VeREF+, where setting P5SEL.0 disables the output driver and input Schmitt trigger. |+| 10 | P5.1/A9/VeREF- | bidirectional | General-purpose digital I/O; analog input A9 and negative terminal VeREF- for an external ADC reference, where setting P5SEL.1 disables the output driver and input Schmitt trigger. |+| 11 | AVCC | power_in | Analog power supply. |+| 12 | P5.4/XIN | bidirectional | General-purpose digital I/O; input terminal for crystal oscillator XT1 in crystal or bypass mode (selected with P5SEL.4 and XT1BYPASS). |+| 13 | P5.5/XOUT | bidirectional | General-purpose digital I/O; output terminal of crystal oscillator XT1 in crystal mode (usable as GPIO in bypass mode). |+| 14 | AVSS | power_in | Analog ground supply. |+| 15 | DVCC | power_in | Digital power supply. |+| 16 | DVSS | power_in | Digital ground supply. |+| 17 | VCORE | power_out | Regulated core power supply output for internal use only; no external current loading is possible and it should only be connected to the recommended CVCORE capacitor. |+| 18 | P1.0/TA0CLK/ACLK | bidirectional | General-purpose digital I/O with port interrupt; TA0 clock input TA0CLK or ACLK output divided by 1, 2, 4, 8, 16, or 32. |+| 19 | P1.1/TA0.0 | bidirectional | General-purpose digital I/O with port interrupt; TA0 CCR0 capture input CCI0A or compare output Out0, and BSL transmit output. |+| 20 | P1.2/TA0.1 | bidirectional | General-purpose digital I/O with port interrupt; TA0 CCR1 capture input CCI1A or compare output Out1, and BSL receive input. |+| 21 | P1.3/TA0.2 | bidirectional | General-purpose digital I/O with port interrupt; TA0 CCR2 capture input CCI2A or compare output Out2. |+| 22 | P1.4/TA0.3 | bidirectional | General-purpose digital I/O with port interrupt; TA0 CCR3 capture input CCI3A or compare output Out3. |+| 23 | P1.5/TA0.4 | bidirectional | General-purpose digital I/O with port interrupt; TA0 CCR4 capture input CCI4A or compare output Out4. |+| 24 | P1.6/TA1CLK/CBOUT | bidirectional | General-purpose digital I/O with port interrupt; TA1 clock input TA1CLK or Comparator_B output CBOUT. |+| 25 | P1.7/TA1.0 | bidirectional | General-purpose digital I/O with port interrupt; TA1 CCR0 capture input CCI0A or compare output TA1.0. |+| 26 | P2.0/TA1.1 | bidirectional | General-purpose digital I/O with port interrupt; TA1 CCR1 capture input CCI1A or compare output TA1.1. |+| 27 | P2.1/TA1.2 | bidirectional | General-purpose digital I/O with port interrupt; TA1 CCR2 capture input CCI2A or compare output TA1.2. |+| 28 | P2.2/TA2CLK/SMCLK | bidirectional | General-purpose digital I/O with port interrupt; TA2 clock input TA2CLK or SMCLK output. |+| 29 | P2.3/TA2.0 | bidirectional | General-purpose digital I/O with port interrupt; TA2 CCR0 capture input CCI0A or compare output TA2.0. |+| 30 | P2.4/TA2.1 | bidirectional | General-purpose digital I/O with port interrupt; TA2 CCR1 capture input CCI1A or compare output TA2.1. |+| 31 | P2.5/TA2.2 | bidirectional | General-purpose digital I/O with port interrupt; TA2 CCR2 capture input CCI2A or compare output TA2.2. |+| 32 | P2.6/RTCCLK/DMAE0 | bidirectional | General-purpose digital I/O with port interrupt; DMA external trigger input DMAE0 or RTCCLK output, selected by P2SEL. |+| 33 | P2.7/UCB0STE/UCA0CLK | bidirectional | General-purpose digital I/O; USCI_B0 SPI transmit enable or USCI_A0 clock input/output, where UCA0CLK takes precedence over UCB0STE. |+| 34 | P3.0/UCB0SIMO/UCB0SDA | bidirectional | General-purpose digital I/O; USCI_B0 SPI slave-in/master-out or I2C data line (direction controlled by USCI). |+| 35 | P3.1/UCB0SOMI/UCB0SCL | bidirectional | General-purpose digital I/O; USCI_B0 SPI slave-out/master-in or I2C clock line, which drives only logical 0 to VSS in I2C mode. |+| 36 | P3.2/UCB0CLK/UCA0STE | bidirectional | General-purpose digital I/O; USCI_B0 clock input/output or USCI_A0 SPI transmit enable, where UCB0CLK takes precedence over UCA0STE. |+| 37 | P3.3/UCA0TXD/UCA0SIMO | bidirectional | General-purpose digital I/O; USCI_A0 UART transmit output or USCI_A0 SPI slave-in/master-out. |+| 38 | P3.4/UCA0RXD/UCA0SOMI | bidirectional | General-purpose digital I/O; USCI_A0 UART receive input or USCI_A0 SPI slave-out/master-in. |+| 39 | DVSS | power_in | Digital ground supply. |+| 40 | DVCC | power_in | Digital power supply. |+| 41 | P4.0/PM_UCB1STE/PM_UCA1CLK | bidirectional | General-purpose digital I/O; port-mapped secondary function (default USCI_B1 SPI transmit enable or USCI_A1 clock) selected via P4MAP0, with mapping values 1 to 30 enabling the function. |+| 42 | P4.1/PM_UCB1SIMO/PM_UCB1SDA | bidirectional | General-purpose digital I/O; port-mapped USCI_B1 SPI slave-in/master-out or I2C data (default mapping) selected via P4MAP1. |+| 43 | P4.2/PM_UCB1SOMI/PM_UCB1SCL | bidirectional | General-purpose digital I/O; port-mapped USCI_B1 SPI slave-out/master-in or I2C clock (default mapping) selected via P4MAP2. |+| 44 | P4.3/PM_UCB1CLK/PM_UCA1STE | bidirectional | General-purpose digital I/O; port-mapped USCI_B1 clock input/output or USCI_A1 SPI transmit enable (default mapping) selected via P4MAP3. |+| 45 | P4.4/PM_UCA1TXD/PM_UCA1SIMO | bidirectional | General-purpose digital I/O; port-mapped USCI_A1 UART transmit or SPI slave-in/master-out (default mapping) selected via P4MAP4. |+| 46 | P4.5/PM_UCA1RXD/PM_UCA1SOMI | bidirectional | General-purpose digital I/O; port-mapped USCI_A1 UART receive or SPI slave-out/master-in (default mapping) selected via P4MAP5. |+| 47 | P4.6/PM_NONE | bidirectional | General-purpose digital I/O; port mapping value PM_NONE connects the mapped secondary function to DVSS. |+| 48 | P4.7/PM_NONE | bidirectional | General-purpose digital I/O; port mapping value PM_NONE connects the mapped secondary function to DVSS. |+| 49 | P7.0/TB0.0 | bidirectional | General-purpose digital I/O; Timer_B TB0 CCR0 capture input CCI0A or compare output TB0.0. |+| 50 | P7.1/TB0.1 | bidirectional | General-purpose digital I/O; Timer_B TB0 CCR1 capture input CCI1A or compare output TB0.1. |+| 51 | P7.2/TB0.2 | bidirectional | General-purpose digital I/O; Timer_B TB0 CCR2 capture input CCI2A or compare output TB0.2. |+| 52 | P7.3/TB0.3 | bidirectional | General-purpose digital I/O; Timer_B TB0 CCR3 capture input CCI3A or compare output TB0.3. |+| 53 | P7.4/TB0.4 | bidirectional | General-purpose digital I/O; Timer_B TB0 CCR4 capture input CCI4A or compare output TB0.4. |+| 54 | P7.5/TB0.5 | bidirectional | General-purpose digital I/O; Timer_B TB0 CCR5 capture input CCI5A or compare output TB0.5. |+| 55 | NC | unconnected | Not connected; listed as NC in the RGC pinout. |+| 56 | RST/NMI | input | Device reset or non-maskable interrupt input (Schmitt-trigger input). |+| 57 | P5.2/XT2IN | bidirectional | General-purpose digital I/O; XT2 high-frequency crystal input in crystal or bypass mode (selected with P5SEL.2 and XT2BYPASS). |+| 58 | P5.3/XT2OUT | bidirectional | General-purpose digital I/O; XT2 crystal output in crystal mode, usable as GPIO in bypass mode. |+| 59 | TEST/SBWTCK | input | Test mode pin; Spy-Bi-Wire clock input (SBWTCK) for development tools and programmers. |+| 60 | PJ.0/TDO | bidirectional | General-purpose digital I/O PJ.0 or JTAG test data output TDO. |+| 61 | PJ.1/TDI/TCLK | bidirectional | General-purpose digital I/O PJ.1 or JTAG test data input TDI / test clock TCLK. |+| 62 | PJ.2/TMS | bidirectional | General-purpose digital I/O PJ.2 or JTAG test mode select TMS; pullups are automatically activated on TMS in JTAG mode. |+| 63 | PJ.3/TCK | bidirectional | General-purpose digital I/O PJ.3 or JTAG test clock TCK; pullups are automatically activated on TCK in JTAG mode. |+| 64 | RSTDVCC/SBWTDIO | bidirectional | Spy-Bi-Wire data input/output (SBWTDIO) for development tools and device programmers. |+| 65 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-64(9x9) |+| Category | Embedded Processors & Controllers |+| Pins | 65 |++## CAD (KiCad official)++- Symbol: `MSP430F5247IRGCR`+- Footprint: `Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm`+- 3D model: VQFN-64(9x9) (KiCad packages3D, STEP)+- 3D model files: `msp430f5247irgcr-etched.step` / `msp430f5247irgcr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `msp430f5247irgcr.step` / `msp430f5247irgcr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/msp430f5239) (114 pp, sha256 `9acee9f0b4b7514f`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/msp430f5247irgcr-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "msp430f5247irgcr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "msp430f5247irgcr.kicad_sym",+ "msp430f5247irgcr.kicad_mod",+ "msp430f5247irgcr.glb",+ "msp430f5247irgcr.step",+ "msp430f5247irgcr.lbr",+ "docs/hero.png",+ "docs/msp430f5247irgcr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "msp430f5247irgcr-hero.glb",+ "msp430f5247irgcr-hero.overlay.json"+ ],+ "component": {+ "mpn": "MSP430F5247IRGCR",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-64(9x9)",+ "pin_count": 65,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/msp430f5239",+ "parts": {+ "symbol": "msp430f5247irgcr.kicad_sym",+ "footprint": "msp430f5247irgcr.kicad_mod",+ "model_3d": "msp430f5247irgcr-hero.glb",+ "model_3d_plain": "msp430f5247irgcr.glb",+ "model_3d_step": "msp430f5247irgcr-etched.step",+ "model_3d_step_plain": "msp430f5247irgcr.step",+ "lbr": "msp430f5247irgcr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2871308",+ "digikey": "296-43088-2-ND",+ "mouser": "595-MSP430F5247IRGCR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T17:02:40Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-43088-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-MSP430F5247IRGCR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "P6.0/A0/CB0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O P6.0, also ADC10 analog input A0 and Comparator_B input CB0, where selecting CB0 disables the pin's output driver and input buffer."+ },+ {+ "number": "2",+ "name": "P6.1/A1/CB1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O P6.1, also ADC10 analog input A1 and Comparator_B input CB1, where selecting CB1 disables the pin's output driver and input buffer."+ },+ {+ "number": "3",+ "name": "P6.2/A2/CB2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O P6.2, also ADC10 analog input A2 and Comparator_B input CB2, where selecting CB2 disables the pin's output driver and input buffer."+ },+ {+ "number": "4",+ "name": "P6.3/A3/CB3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O P6.3, also ADC10 analog input A3 and Comparator_B input CB3, where selecting CB3 disables the pin's output driver and input buffer."+ },+ {+ "number": "5",+ "name": "P6.4/CB4/A4",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; Comparator_B input CB4 and analog input A4 for the ADC."+ },+ {+ "number": "6",+ "name": "P6.5/CB5/A5",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; Comparator_B input CB5 and analog input A5 for the ADC."+ },+ {+ "number": "7",+ "name": "P6.6/CB6/A6",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; Comparator_B input CB6 and analog input A6 for the ADC."+ },+ {+ "number": "8",+ "name": "P6.7/CB7/A7",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; Comparator_B input CB7 and analog input A7 for the ADC."+ },+ {+ "number": "9",+ "name": "P5.0/A8/VeREF+",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; analog input A8 and input for an external ADC reference voltage VeREF+, where setting P5SEL.0 disables the output driver and input Schmitt trigger."+ },+ {+ "number": "10",+ "name": "P5.1/A9/VeREF-",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; analog input A9 and negative terminal VeREF- for an external ADC reference, where setting P5SEL.1 disables the output driver and input Schmitt trigger."+ },+ {+ "number": "11",+ "name": "AVCC",+ "type": "power_in",+ "description": "Analog power supply."+ },+ {+ "number": "12",+ "name": "P5.4/XIN",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; input terminal for crystal oscillator XT1 in crystal or bypass mode (selected with P5SEL.4 and XT1BYPASS)."+ },+ {+ "number": "13",+ "name": "P5.5/XOUT",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; output terminal of crystal oscillator XT1 in crystal mode (usable as GPIO in bypass mode)."+ },+ {+ "number": "14",+ "name": "AVSS",+ "type": "power_in",+ "description": "Analog ground supply."+ },+ {+ "number": "15",+ "name": "DVCC",+ "type": "power_in",+ "description": "Digital power supply."+ },+ {+ "number": "16",+ "name": "DVSS",+ "type": "power_in",+ "description": "Digital ground supply."+ },+ {+ "number": "17",+ "name": "VCORE",+ "type": "power_out",+ "description": "Regulated core power supply output for internal use only; no external current loading is possible and it should only be connected to the recommended CVCORE capacitor."+ },+ {+ "number": "18",+ "name": "P1.0/TA0CLK/ACLK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; TA0 clock input TA0CLK or ACLK output divided by 1, 2, 4, 8, 16, or 32."+ },+ {+ "number": "19",+ "name": "P1.1/TA0.0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; TA0 CCR0 capture input CCI0A or compare output Out0, and BSL transmit output."+ },+ {+ "number": "20",+ "name": "P1.2/TA0.1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; TA0 CCR1 capture input CCI1A or compare output Out1, and BSL receive input."+ },+ {+ "number": "21",+ "name": "P1.3/TA0.2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; TA0 CCR2 capture input CCI2A or compare output Out2."+ },+ {+ "number": "22",+ "name": "P1.4/TA0.3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; TA0 CCR3 capture input CCI3A or compare output Out3."+ },+ {+ "number": "23",+ "name": "P1.5/TA0.4",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; TA0 CCR4 capture input CCI4A or compare output Out4."+ },+ {+ "number": "24",+ "name": "P1.6/TA1CLK/CBOUT",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; TA1 clock input TA1CLK or Comparator_B output CBOUT."+ },+ {+ "number": "25",+ "name": "P1.7/TA1.0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; TA1 CCR0 capture input CCI0A or compare output TA1.0."+ },+ {+ "number": "26",+ "name": "P2.0/TA1.1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; TA1 CCR1 capture input CCI1A or compare output TA1.1."+ },+ {+ "number": "27",+ "name": "P2.1/TA1.2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; TA1 CCR2 capture input CCI2A or compare output TA1.2."+ },+ {+ "number": "28",+ "name": "P2.2/TA2CLK/SMCLK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; TA2 clock input TA2CLK or SMCLK output."+ },+ {+ "number": "29",+ "name": "P2.3/TA2.0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; TA2 CCR0 capture input CCI0A or compare output TA2.0."+ },+ {+ "number": "30",+ "name": "P2.4/TA2.1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; TA2 CCR1 capture input CCI1A or compare output TA2.1."+ },+ {+ "number": "31",+ "name": "P2.5/TA2.2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; TA2 CCR2 capture input CCI2A or compare output TA2.2."+ },+ {+ "number": "32",+ "name": "P2.6/RTCCLK/DMAE0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with port interrupt; DMA external trigger input DMAE0 or RTCCLK output, selected by P2SEL."+ },+ {+ "number": "33",+ "name": "P2.7/UCB0STE/UCA0CLK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; USCI_B0 SPI transmit enable or USCI_A0 clock input/output, where UCA0CLK takes precedence over UCB0STE."+ },+ {+ "number": "34",+ "name": "P3.0/UCB0SIMO/UCB0SDA",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; USCI_B0 SPI slave-in/master-out or I2C data line (direction controlled by USCI)."+ },+ {+ "number": "35",+ "name": "P3.1/UCB0SOMI/UCB0SCL",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; USCI_B0 SPI slave-out/master-in or I2C clock line, which drives only logical 0 to VSS in I2C mode."+ },+ {+ "number": "36",+ "name": "P3.2/UCB0CLK/UCA0STE",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; USCI_B0 clock input/output or USCI_A0 SPI transmit enable, where UCB0CLK takes precedence over UCA0STE."+ },+ {+ "number": "37",+ "name": "P3.3/UCA0TXD/UCA0SIMO",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; USCI_A0 UART transmit output or USCI_A0 SPI slave-in/master-out."+ },+ {+ "number": "38",+ "name": "P3.4/UCA0RXD/UCA0SOMI",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; USCI_A0 UART receive input or USCI_A0 SPI slave-out/master-in."+ },+ {+ "number": "39",+ "name": "DVSS",+ "type": "power_in",+ "description": "Digital ground supply."+ },+ {+ "number": "40",+ "name": "DVCC",+ "type": "power_in",+ "description": "Digital power supply."+ },+ {+ "number": "41",+ "name": "P4.0/PM_UCB1STE/PM_UCA1CLK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; port-mapped secondary function (default USCI_B1 SPI transmit enable or USCI_A1 clock) selected via P4MAP0, with mapping values 1 to 30 enabling the function."+ },+ {+ "number": "42",+ "name": "P4.1/PM_UCB1SIMO/PM_UCB1SDA",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; port-mapped USCI_B1 SPI slave-in/master-out or I2C data (default mapping) selected via P4MAP1."+ },+ {+ "number": "43",+ "name": "P4.2/PM_UCB1SOMI/PM_UCB1SCL",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; port-mapped USCI_B1 SPI slave-out/master-in or I2C clock (default mapping) selected via P4MAP2."+ },+ {+ "number": "44",+ "name": "P4.3/PM_UCB1CLK/PM_UCA1STE",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; port-mapped USCI_B1 clock input/output or USCI_A1 SPI transmit enable (default mapping) selected via P4MAP3."+ },+ {+ "number": "45",+ "name": "P4.4/PM_UCA1TXD/PM_UCA1SIMO",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; port-mapped USCI_A1 UART transmit or SPI slave-in/master-out (default mapping) selected via P4MAP4."+ },+ {+ "number": "46",+ "name": "P4.5/PM_UCA1RXD/PM_UCA1SOMI",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; port-mapped USCI_A1 UART receive or SPI slave-out/master-in (default mapping) selected via P4MAP5."+ },+ {+ "number": "47",+ "name": "P4.6/PM_NONE",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; port mapping value PM_NONE connects the mapped secondary function to DVSS."+ },+ {+ "number": "48",+ "name": "P4.7/PM_NONE",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; port mapping value PM_NONE connects the mapped secondary function to DVSS."+ },+ {+ "number": "49",+ "name": "P7.0/TB0.0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; Timer_B TB0 CCR0 capture input CCI0A or compare output TB0.0."+ },+ {+ "number": "50",+ "name": "P7.1/TB0.1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; Timer_B TB0 CCR1 capture input CCI1A or compare output TB0.1."+ },+ {+ "number": "51",+ "name": "P7.2/TB0.2",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; Timer_B TB0 CCR2 capture input CCI2A or compare output TB0.2."+ },+ {+ "number": "52",+ "name": "P7.3/TB0.3",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; Timer_B TB0 CCR3 capture input CCI3A or compare output TB0.3."+ },+ {+ "number": "53",+ "name": "P7.4/TB0.4",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; Timer_B TB0 CCR4 capture input CCI4A or compare output TB0.4."+ },+ {+ "number": "54",+ "name": "P7.5/TB0.5",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; Timer_B TB0 CCR5 capture input CCI5A or compare output TB0.5."+ },+ {+ "number": "55",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected; listed as NC in the RGC pinout."+ },+ {+ "number": "56",+ "name": "RST/NMI",+ "type": "input",+ "description": "Device reset or non-maskable interrupt input (Schmitt-trigger input)."+ },+ {+ "number": "57",+ "name": "P5.2/XT2IN",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; XT2 high-frequency crystal input in crystal or bypass mode (selected with P5SEL.2 and XT2BYPASS)."+ },+ {+ "number": "58",+ "name": "P5.3/XT2OUT",+ "type": "bidirectional",+ "description": "General-purpose digital I/O; XT2 crystal output in crystal mode, usable as GPIO in bypass mode."+ },+ {+ "number": "59",+ "name": "TEST/SBWTCK",+ "type": "input",+ "description": "Test mode pin; Spy-Bi-Wire clock input (SBWTCK) for development tools and programmers."+ },+ {+ "number": "60",+ "name": "PJ.0/TDO",+ "type": "bidirectional",+ "description": "General-purpose digital I/O PJ.0 or JTAG test data output TDO."+ },+ {+ "number": "61",+ "name": "PJ.1/TDI/TCLK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O PJ.1 or JTAG test data input TDI / test clock TCLK."+ },+ {+ "number": "62",+ "name": "PJ.2/TMS",+ "type": "bidirectional",+ "description": "General-purpose digital I/O PJ.2 or JTAG test mode select TMS; pullups are automatically activated on TMS in JTAG mode."+ },+ {+ "number": "63",+ "name": "PJ.3/TCK",+ "type": "bidirectional",+ "description": "General-purpose digital I/O PJ.3 or JTAG test clock TCK; pullups are automatically activated on TCK in JTAG mode."+ },+ {+ "number": "64",+ "name": "RSTDVCC/SBWTDIO",+ "type": "bidirectional",+ "description": "Spy-Bi-Wire data input/output (SBWTDIO) for development tools and device programmers."+ },+ {+ "number": "65",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin numbers 1-64 and pin names were read from the RGC pin diagram (Figure 4-1, page 8) for MSP430F52; The excerpt contains only the first part of Table 4-1 (Signal Descriptions, page 13). Descriptions f; Pins 1-4 (P6.0-P6.3) are not in the Table 4-1 excerpt; their function is taken from the Port P6 func",+ "exposed pad 65 added from the footprint",+ "32/65 pins cited to the wrong page (name found elsewhere): ['22:P1.4/TA0.3@p75', '23:P1.5/TA0.4@p75', '24:P1.6/TA1CLK/CBOUT@p75', '25:P1.7/TA1.0@p75']"+ ],+ "pages_sent": 40,+ "cost_usd": 0.2603,+ "at": "2026-10-08T17:02:12"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/msp430f5239",+ "pages": 114,+ "sha256": "9acee9f0b4b7514f",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 65,+ "described": 65,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "msp430f5247irgcr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 0.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "msp430f5247irgcr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 0.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "d3c82dd18d010a020e2ed851ce777f2e54fa7c2d6d54982007c99fdadd9f76c8",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}