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MSP430F4351IPNR

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Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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MSP430F4351IPNR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-80(12x12)

MSP430F4351IPNR from Texas Instruments, in a LQFP-80(12x12). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVCC1 power_in Digital supply voltage, positive terminal.
2 P6.3 bidirectional General-purpose digital I/O.
3 P6.4 bidirectional General-purpose digital I/O.
4 P6.5 bidirectional General-purpose digital I/O.
5 P6.6 bidirectional General-purpose digital I/O.
6 P6.7/SVSIN bidirectional General-purpose digital I/O / input to brownout, supply voltage supervisor.
7 Reserved unconnected Reserved, do not connect externally.
8 XIN input Input port for crystal oscillator XT1. Standard or watch crystals can be connected.
9 XOUT output Output terminal of crystal oscillator XT1.
10 DVSS power_in Connect to DVSS.
11 DVSS power_in Connect to DVSS.
12 P5.1/S0 bidirectional General-purpose digital I/O / LCD segment output 0.
13 P5.0/S1 bidirectional General-purpose digital I/O / LCD segment output 1.
14 P4.7/S2 bidirectional General-purpose digital I/O / LCD segment output 2.
15 P4.6/S3 bidirectional General-purpose digital I/O / LCD segment output 3.
16 P4.5/S4 bidirectional General-purpose digital I/O / LCD segment output 4.
17 P4.4/S5 bidirectional General-purpose digital I/O / LCD segment output 5.
18 P4.3/S6 bidirectional General-purpose digital I/O / LCD segment output 6.
19 P4.2/S7 bidirectional General-purpose digital I/O / LCD segment output 7.
20 P4.1/S8 bidirectional General-purpose digital I/O / LCD segment output 8.
21 P4.0/S9 bidirectional General-purpose digital I/O / LCD segment output 9.
22 S10 output LCD segment output 10.
23 S11 output LCD segment output 11.
24 S12 output LCD segment output 12.
25 S13 output LCD segment output 13.
26 S14 output LCD segment output 14.
27 S15 output LCD segment output 15.
28 S16 output LCD segment output 16.
29 S17 output LCD segment output 17.
30 P2.7/S18 bidirectional General-purpose digital I/O / LCD segment output 18.
31 P2.6/CAOUT/S19 bidirectional General-purpose digital I/O / Comparator_A output / LCD segment output 19.
32 S20 output LCD segment output 20.
33 S21 output LCD segment output 21.
34 S22 output LCD segment output 22.
35 S23 output LCD segment output 23.
36 P3.7/S24 bidirectional General-purpose digital I/O / LCD segment output 24.
37 P3.6/S25 bidirectional General-purpose digital I/O / LCD segment output 25.
38 P3.5/S26 bidirectional General-purpose digital I/O / LCD segment output 26.
39 P3.4/S27 bidirectional General-purpose digital I/O / LCD segment output 27.
40 P3.3/UCLK0/S28 bidirectional General-purpose digital I/O / external clock input in USART0 UART or SPI mode, clock output in USART0 SPI mode / LCD segment output 28.
41 P3.2/SOMI0/S29 bidirectional General-purpose digital I/O / slave out, master in of USART0 SPI mode / LCD segment output 29.
42 P3.1/SIMO0/S30 bidirectional General-purpose digital I/O / slave out, master out of USART0 SPI mode / LCD segment output 30.
43 P3.0/STE0/S31 bidirectional General-purpose digital I/O / slave transmit enable of USART0 SPI mode / LCD segment output 31.
44 COM0 output COM0 to COM3 are used for LCD backplanes.
45 P5.2/COM1 bidirectional General-purpose digital I/O / common output; COM0 to COM3 are used for LCD backplanes.
46 P5.3/COM2 bidirectional General-purpose digital I/O / common output; COM0 to COM3 are used for LCD backplanes.
47 P5.4/COM3 bidirectional General-purpose digital I/O / common output; COM0 to COM3 are used for LCD backplanes.
48 R03 input Input port of fourth positive (lowest) analog LCD level (V5).
49 P5.5/R13 bidirectional General-purpose digital I/O / input port of third most positive analog LCD level (V4 or V3).
50 P5.6/R23 bidirectional General-purpose digital I/O / input port of second most positive analog LCD level (V2).
51 P5.7/R33 bidirectional General-purpose digital I/O / output port of most positive analog LCD level (V1).
52 DVCC2 power_in Digital supply voltage, positive terminal.
53 DVSS2 power_in Digital supply voltage, negative terminal.
54 P2.5/URXD0 bidirectional General-purpose digital I/O / receive data in of USART0 UART mode.
55 P2.4/UTXD0 bidirectional General-purpose digital I/O / transmit data out of USART0 UART mode.
56 P2.3/TB2 bidirectional General-purpose digital I/O / Timer_B3 CCR2; capture CCI2A/CCI2B input, compare Out2 output.
57 P2.2/TB1 bidirectional General-purpose digital I/O / Timer_B3 CCR1; capture CCI1A/CCI1B input, compare Out1 output.
58 P2.1/TB0 bidirectional General-purpose digital I/O / Timer_B3 CCR0; capture CCI0A/CCI0B input, compare Out0 output.
59 P2.0/TA2 bidirectional General-purpose digital I/O / Timer_A capture CCI2A input, compare Out2 output.
60 P1.7/CA1 bidirectional General-purpose digital I/O / Comparator_A input.
61 P1.6/CA0 bidirectional General-purpose digital I/O / Comparator_A input.
62 P1.5/TACLK/ACLK bidirectional General-purpose digital I/O / Timer_A clock signal TACLK input / ACLK output (divided by 1, 2, 4, or 8).
63 P1.4/TBCLK/SMCLK bidirectional General-purpose digital I/O / input clock TBCLK for Timer_B3 / submain system clock SMCLK output.
64 P1.3/TBOUTH/SVSOUT bidirectional General-purpose digital I/O / switches all PWM digital output ports to high impedance (Timer_B3 TB0 to TB2) / SVS comparator output.
65 P1.2/TA1 bidirectional General-purpose digital I/O / Timer_A capture CCI1A input, compare Out1 output.
66 P1.1/TA0/MCLK bidirectional General-purpose digital I/O / Timer_A capture CCI0B input / MCLK output; TA0 is only an input on this pin; BSL receive.
67 P1.0/TA0 bidirectional General-purpose digital I/O / Timer_A capture CCI0A input, compare Out0 output / BSL transmit.
68 XT2OUT output Output terminal of crystal oscillator XT2.
69 XT2IN input Input port for crystal oscillator XT2. Only standard crystals can be connected.
70 TDO/TDI bidirectional Test data output port; TDO/TDI data output or programming data input terminal.
71 TDI/TCLK input Test data input or test clock input. The device protection fuse is connected to TDI/TCLK.
72 TMS input Test mode select. TMS is used as an input port for device programming and test.
73 TCK input Test clock. TCK is the clock input port for device programming and test.
74 RST/NMI input Reset input or nonmaskable interrupt input port.
75 P6.0 bidirectional General-purpose digital I/O.
76 P6.1 bidirectional General-purpose digital I/O.
77 P6.2 bidirectional General-purpose digital I/O.
78 AVSS power_in Analog supply voltage, negative terminal; supplies SVS, brownout, oscillator, comparator_A, port 1, and LCD resistive divider circuitry.
79 DVSS1 power_in Digital supply voltage, negative terminal.
80 AVCC power_in Analog supply voltage, positive terminal; supplies SVS, brownout, oscillator, comparator_A, port 1, and LCD resistive divider circuitry; must not power up prior to DVCC1/DVCC2.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-80(12x12)
Category Embedded Processors & Controllers
Pins 80

CAD (KiCad official)

  • Symbol: MSP430F4351IPNR
  • Footprint: Package_QFP:LQFP-80_12x12mm_P0.5mm
  • 3D model: LQFP-80(12x12) (KiCad packages3D, STEP)
  • 3D model files: msp430f4351ipnr-etched.step / msp430f4351ipnr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430f4351ipnr.step / msp430f4351ipnr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (89 pp, sha256 ff6c7ef212cfbf3f, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF