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MSP430F427AIPM

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Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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MSP430F427AIPM

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

MSP430F427AIPM from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVCC power_in Digital supply voltage, positive terminal.
2 A0.0+ input Internal connection to SD16 Channel 0, input 0 +; if unused, the analog input pair should be shorted and connected to analog ground.
3 A0.0- input Internal connection to SD16 Channel 0, input 0 -; if unused, the analog input pair should be shorted and connected to analog ground.
4 A1.0+ input Internal connection to SD16 Channel 1, input 0 +; if unused, the analog input pair should be shorted and connected to analog ground.
5 A1.0- input Internal connection to SD16 Channel 1, input 0 -; if unused, the analog input pair should be shorted and connected to analog ground.
6 A2.0+ input Internal connection to SD16 Channel 2, input 0 +; if unused, the analog input pair should be shorted and connected to analog ground.
7 A2.0- input Internal connection to SD16 Channel 2, input 0 -; if unused, the analog input pair should be shorted and connected to analog ground.
8 XIN input Input port for crystal oscillator XT1; standard or watch crystals can be connected.
9 XOUT output Output terminal of crystal oscillator XT1.
10 VREF power_in Input for an external reference voltage, or internal reference voltage output that can be used as mid-voltage.
11 P2.2/STE0 bidirectional General-purpose digital I/O; slave transmit enable for USART0 in SPI mode.
12 S0 output LCD segment output 0.
13 S1 output LCD segment output 1.
14 S2 output LCD segment output 2.
15 S3 output LCD segment output 3.
16 S4 output LCD segment output 4.
17 S5 output LCD segment output 5.
18 S6 output LCD segment output 6.
19 S7 output LCD segment output 7.
20 S8 output LCD segment output 8.
21 S9 output LCD segment output 9.
22 S10 output LCD segment output 10.
23 S11 output LCD segment output 11.
24 S12 output LCD segment output 12.
25 S13 output LCD segment output 13.
26 S14 output LCD segment output 14.
27 S15 output LCD segment output 15.
28 S16 output LCD segment output 16.
29 S17 output LCD segment output 17.
30 S18 output LCD segment output 18.
31 S19 output LCD segment output 19.
32 S20 output LCD segment output 20.
33 S21 output LCD segment output 21.
34 S22 output LCD segment output 22.
35 S23 output LCD segment output 23.
36 COM0 output LCD common output used for LCD backplanes (COM0 to COM3).
37 COM1 output LCD common output used for LCD backplanes (COM0 to COM3).
38 COM2 output LCD common output used for LCD backplanes (COM0 to COM3).
39 COM3 output LCD common output used for LCD backplanes (COM0 to COM3).
40 R03 input Input port for the fourth (lowest) positive analog LCD level, V5.
41 R13 input Input port for the third most positive analog LCD level, V4 or V3.
42 R23 input Input port for the second most positive analog LCD level, V2.
43 R33 output Output port for the most positive analog LCD level, V1.
44 P2.1/UCLK0/S24 bidirectional General-purpose digital I/O; external clock input for USART0 UART or SPI mode, clock output in SPI mode, or LCD segment output 24.
45 P2.0/TA2/S25 bidirectional General-purpose digital I/O; Timer_A CCI2A capture input or Out2 compare output, or LCD segment output 25.
46 P1.7/SOMI0/S26 bidirectional General-purpose digital I/O; slave out/master in of USART0 SPI mode, or LCD segment output 26.
47 P1.6/SIMO0/S27 bidirectional General-purpose digital I/O; slave in/master out of USART0 SPI mode, or LCD segment output 27.
48 P1.5/TACLK/ACLK/S28 bidirectional General-purpose digital I/O; Timer_A and SD16 clock input TACLK, ACLK output divided by 1, 2, 4, or 8, or LCD segment output 28.
49 P1.4/S29 bidirectional General-purpose digital I/O, or LCD segment output 29.
50 P1.3/SVSOUT/S30 bidirectional General-purpose digital I/O; SVS comparator output, or LCD segment output 30.
51 P1.2/TA1/S31 bidirectional General-purpose digital I/O; Timer_A CCI1A and CCI1B capture inputs, Out1 compare output, or LCD segment output 31.
52 P1.1/TA0/MCLK bidirectional General-purpose digital I/O; Timer_A CCI0B capture input or MCLK output; TA0 is only an input on this pin, which also serves as BSL receive.
53 P1.0/TA0 bidirectional General-purpose digital I/O; Timer_A CCI0A capture input or Out0 compare output, also BSL transmit.
54 TDO/TDI bidirectional Test data output port, or programming data input terminal.
55 TDI/TCLK input Test data input or test clock input; the device protection fuse is connected to TDI.
56 TMS input Test mode select; used as an input port for device programming and test.
57 TCK input Test clock; clock input port for device programming and test.
58 RST/NMI input Reset input or nonmaskable interrupt input port.
59 P2.5/URXD0 bidirectional General-purpose digital I/O; receive data input for USART0 UART mode.
60 P2.4/UTXD0 bidirectional General-purpose digital I/O; transmit data output for USART0 UART mode.
61 P2.3/SVSIN bidirectional General-purpose digital I/O; analog input to the brownout and supply voltage supervisor.
62 AVSS power_in Analog supply voltage, negative terminal; supplies SD16, SVS, brownout, oscillator, and LCD resistive divider circuitry.
63 DVSS power_in Digital supply voltage, negative terminal.
64 AVCC power_in Analog supply voltage, positive terminal; supplies SD16, SVS, brownout, oscillator, and LCD resistive divider circuitry, and must not power up prior to DVCC.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: MSP430F427AIPM
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: msp430f427aipm-etched.step / msp430f427aipm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430f427aipm.step / msp430f427aipm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 21e18e9f86309a27, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF