# MSP430F2616TPMR

**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

MSP430F2616TPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC1 | power_in | Digital supply voltage, positive terminal, supplies all digital parts. |
| 2 | P6.3/A3 | bidirectional | General-purpose digital I/O pin, also analog input A3 for the 12-bit ADC. |
| 3 | P6.4/A4 | bidirectional | General-purpose digital I/O pin, also analog input A4 for the 12-bit ADC. |
| 4 | P6.5/A5/DAC1 | bidirectional | General-purpose digital I/O pin, also analog input A5 for the 12-bit ADC and DAC12.1 output (MSP430F261x only). |
| 5 | P6.6/A6/DAC0 | bidirectional | General-purpose digital I/O pin, also analog input A6 for the 12-bit ADC and DAC12.0 output (MSP430F261x only). |
| 6 | P6.7/A7/DAC1/SVSIN | bidirectional | General-purpose digital I/O pin, also analog input A7 for the 12-bit ADC, DAC12.1 output, and SVS input. |
| 7 | VREF+ | power_in | Output of the positive terminal of the reference voltage in the ADC12. |
| 8 | XIN | input | Input port for crystal oscillator XT1; standard or watch crystals can be connected. |
| 9 | XOUT | output | Output port for crystal oscillator XT1; standard or watch crystals can be connected. |
| 10 | VeREF+/DAC0 | input | Input for an external reference voltage, also DAC12.0 output. |
| 11 | VREF-/VeREF- | power_in | Negative terminal for the reference voltage for both sources, the internal reference voltage or an external applied reference voltage. |
| 12 | P1.0/TACLK/CAOUT | bidirectional | General-purpose digital I/O pin, also Timer_A clock input TACLK and Comparator_A output CAOUT. |
| 13 | P1.1/TA0 | bidirectional | General-purpose digital I/O pin, also Timer_A CCI0A capture input and Out0 compare output, and BSL transmit. |
| 14 | P1.2/TA1 | bidirectional | General-purpose digital I/O pin, also Timer_A CCI1A capture input and Out1 compare output. |
| 15 | P1.3/TA2 | bidirectional | General-purpose digital I/O pin, also Timer_A CCI2A capture input and Out2 compare output. |
| 16 | P1.4/SMCLK | bidirectional | General-purpose digital I/O pin, also SMCLK signal output. |
| 17 | P1.5/TA0 | bidirectional | General-purpose digital I/O pin, also Timer_A compare Out0 output. |
| 18 | P1.6/TA1 | bidirectional | General-purpose digital I/O pin, also Timer_A compare Out1 output. |
| 19 | P1.7/TA2 | bidirectional | General-purpose digital I/O pin, also Timer_A compare Out2 output. |
| 20 | P2.0/ACLK/CA2 | bidirectional | General-purpose digital I/O pin, also ACLK output and Comparator_A input CA2. |
| 21 | P2.1/TAINCLK/CA3 | bidirectional | General-purpose digital I/O pin, also Timer_A INCLK clock input and Comparator_A input CA3. |
| 22 | P2.2/CAOUT/TA0/CA4 | bidirectional | General-purpose digital I/O pin, also Timer_A CCI0B input, Comparator_A output CAOUT, Comparator_A input CA4, and BSL receive. |
| 23 | P2.3/CA0/TA1 | bidirectional | General-purpose digital I/O pin, also Timer_A Out1 output and Comparator_A input CA0. |
| 24 | P2.4/CA1/TA2 | bidirectional | General-purpose digital I/O pin, also Timer_A Out2 output and Comparator_A input CA1. |
| 25 | P2.5/ROSC/CA5 | bidirectional | General-purpose digital I/O pin, also ROSC input for the external DCO resistor and Comparator_A input CA5. |
| 26 | P2.6/ADC12CLK/DMAE0/CA6 | bidirectional | General-purpose digital I/O pin, also ADC12CLK output, DMA external trigger DMAE0, and Comparator_A input CA6. |
| 27 | P2.7/TA0/CA7 | bidirectional | General-purpose digital I/O pin, also Timer_A Out0 output and Comparator_A input CA7. |
| 28 | P3.0/UCB0STE/UCA0CLK | bidirectional | General-purpose digital I/O pin, also USCI_B0 slave transmit enable or USCI_A0 clock; direction is controlled by the USCI module. |
| 29 | P3.1/UCB0SIMO/UCB0SDA | bidirectional | General-purpose digital I/O pin, also USCI_B0 SPI slave-in/master-out or I2C data SDA; direction is controlled by the USCI module. |
| 30 | P3.2/UCB0SOMI/UCB0SCL | bidirectional | General-purpose digital I/O pin, also USCI_B0 SPI slave-out/master-in or I2C clock SCL; in I2C mode the output drives only logic 0 to VSS. |
| 31 | P3.3/UCB0CLK/UCA0STE | bidirectional | General-purpose digital I/O pin, also USCI_B0 clock input/output or USCI_A0 slave transmit enable. |
| 32 | P3.4/UCA0TXD/UCA0SIMO | bidirectional | General-purpose digital I/O pin, also USCI_A0 UART transmit or SPI slave-in/master-out; direction is controlled by the USCI module. |
| 33 | P3.5/UCA0RXD/UCA0SOMI | bidirectional | General-purpose digital I/O pin, also USCI_A0 UART receive or SPI slave-out/master-in; direction is controlled by the USCI module. |
| 34 | P3.6/UCA1TXD/UCA1SIMO | bidirectional | General-purpose digital I/O pin, also USCI_A1 UART transmit or SPI slave-in/master-out; direction is controlled by the USCI module. |
| 35 | P3.7/UCA1RXD/UCA1SOMI | bidirectional | General-purpose digital I/O pin, also USCI_A1 UART receive or SPI slave-out/master-in; direction is controlled by the USCI module. |
| 36 | P4.0/TB0 | bidirectional | General-purpose digital I/O pin, also Timer_B7 CCI0A/CCI0B capture input and TB0 compare output. |
| 37 | P4.1/TB1 | bidirectional | General-purpose digital I/O pin, also Timer_B7 CCI1A/CCI1B capture input and TB1 compare output. |
| 38 | P4.2/TB2 | bidirectional | General-purpose digital I/O pin, also Timer_B7 CCI2A/CCI2B capture input and TB2 compare output. |
| 39 | P4.3/TB3 | bidirectional | General-purpose digital I/O pin, also Timer_B capture CCI3A/B input and Out3 compare output. |
| 40 | P4.4/TB4 | bidirectional | General-purpose digital I/O pin, also Timer_B capture CCI4A/B input and Out4 compare output. |
| 41 | P4.5/TB5 | bidirectional | General-purpose digital I/O pin, also Timer_B capture CCI5A/B input and Out5 compare output. |
| 42 | P4.6/TB6 | bidirectional | General-purpose digital I/O pin, also Timer_B capture CCI6A input and Out6 compare output. |
| 43 | P4.7/TBCLK | bidirectional | General-purpose digital I/O pin, also Timer_B clock signal TBCLK input. |
| 44 | P5.0/UCB1STE/UCA1CLK | bidirectional | General-purpose digital I/O pin, also USCI_B1 slave transmit enable or USCI_A1 clock input/output. |
| 45 | P5.1/UCB1SIMO/UCB1SDA | bidirectional | General-purpose digital I/O pin, also USCI_B1 SPI slave-in/master-out or I2C data SDA. |
| 46 | P5.2/UCB1SOMI/UCB1SCL | bidirectional | General-purpose digital I/O pin, also USCI_B1 SPI slave-out/master-in or I2C clock SCL. |
| 47 | P5.3/UCB1CLK/UCA1STE | bidirectional | General-purpose digital I/O pin, also USCI_B1 clock input/output or USCI_A1 slave transmit enable. |
| 48 | P5.4/MCLK | bidirectional | General-purpose digital I/O pin, also main system clock MCLK output. |
| 49 | P5.5/SMCLK | bidirectional | General-purpose digital I/O pin, also submain system clock SMCLK output. |
| 50 | P5.6/ACLK | bidirectional | General-purpose digital I/O pin, also auxiliary clock ACLK output. |
| 51 | P5.7/TBOUTH/SVSOUT | bidirectional | General-purpose digital I/O pin, also switches all PWM outputs TB0 to TB6 to high impedance (TBOUTH) and serves as SVS comparator output. |
| 52 | XT2OUT | output | Output terminal of crystal oscillator XT2. |
| 53 | XT2IN | input | Input port for crystal oscillator XT2; only standard crystals can be connected. |
| 54 | TDO/TDI | bidirectional | Test data output port; TDO/TDI data output or programming data input terminal. |
| 55 | TDI/TCLK | input | Test data input or test clock input; the device protection fuse is connected to TDI/TCLK. |
| 56 | TMS | input | Test mode select; used as an input port for device programming and test. |
| 57 | TCK | input | Test clock (JTAG); clock input port for device programming test and bootloader start. |
| 58 | RST/NMI | input | Reset input, nonmaskable interrupt input port, or bootloader start (in flash devices). |
| 59 | P6.0/A0 | bidirectional | General-purpose digital I/O pin, also analog input A0 for the 12-bit ADC. |
| 60 | P6.1/A1 | bidirectional | General-purpose digital I/O pin, also analog input A1 for the 12-bit ADC. |
| 61 | P6.2/A2 | bidirectional | General-purpose digital I/O pin, also analog input A2 for the 12-bit ADC. |
| 62 | AVSS | power_in | Analog supply voltage, negative terminal; supplies only the analog portion of ADC12 and DAC12. |
| 63 | DVSS1 | power_in | Digital supply voltage, negative terminal; supplies all digital parts. |
| 64 | AVCC | power_in | Analog supply voltage, positive terminal; supplies only the analog portion of ADC12 and DAC12. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |

## CAD (KiCad official)

- Symbol: `MSP430F2616TPMR`
- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`
- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files: `msp430f2616tpmr-etched.step` / `msp430f2616tpmr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `msp430f2616tpmr.step` / `msp430f2616tpmr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/msp430f2619) (124 pp, sha256 `9b29f7507412f2ce`, retrieved 2026-10-12, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/msp430f2616tpmr-datasheet.pdf)