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MSP430F247TPMR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

MSP430F247TPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVCC power_in Digital power supply voltage positive terminal supplying power to all digital components, 1.8V to 3.6V.
2 P6.3/A3 bidirectional General purpose digital I/O with analog input A3 for 12-bit ADC, input range 0V to VAVCC.
3 P6.4/A4 bidirectional General purpose digital I/O with analog input A4 for 12-bit ADC, input range 0V to VAVCC.
4 P6.5/A5 bidirectional General purpose digital I/O with analog input A5 for 12-bit ADC, input range 0V to VAVCC.
5 P6.6/A6 bidirectional General purpose digital I/O with analog input A6 for 12-bit ADC, input range 0V to VAVCC.
6 P6.7/A7/SVSIN bidirectional General purpose digital I/O with analog input A7 for 12-bit ADC and SVS input.
7 VREF+ power_in ADC12 reference voltage positive output terminal, 1.5V or 2.5V selectable.
8 XIN input Input for XT1 crystal oscillator supporting standard or 32768Hz watch crystal.
9 XOUT output Output for XT1 crystal oscillator supporting standard or 32768Hz watch crystal.
10 VeREF+ input Input for external reference voltage, minimum 1.4V or greater than VREF-/VeREF-.
11 VREF-/VeREF- power_in Negative terminal for internal or external reference voltage, range 0V to 1.2V.
12 P1.0/TACLK/CAOUT bidirectional General purpose digital I/O with Timer_A clock TACLK input or Comparator_A input.
13 P1.1/TA0 bidirectional General purpose digital I/O with Timer_A capture CCI0A input or compare Out0 output or BSL transmit.
14 P1.2/TA1 bidirectional General purpose digital I/O with Timer_A capture CCI1A input or compare Out1 output.
15 P1.3/TA2 bidirectional General purpose digital I/O with Timer_A capture CCI2A input or compare Out2 output.
16 P1.4/SMCLK bidirectional General purpose digital I/O with SMCLK signal output.
17 P1.5/TA0 bidirectional General purpose digital I/O with Timer_A compare Out0 output.
18 P1.6/TA1 bidirectional General purpose digital I/O with Timer_A compare Out1 output.
19 P1.7/TA2 bidirectional General purpose digital I/O with Timer_A compare Out2 output.
20 P2.0/ACLK/CA2 bidirectional General purpose digital I/O with ACLK output or Comparator_A input.
21 P2.1/TAINCLK/CA3 bidirectional General purpose digital I/O with Timer_A clock INCLK input or Comparator_A input.
22 P2.2/CAOUT/TA0/CA4 bidirectional General purpose digital I/O with Timer_A capture CCI0B input, Comparator_A output, BSL receive or Comparator_A input.
23 P2.3/CA0/TA1 bidirectional General purpose digital I/O with Timer_A compare Out1 output or Comparator_A input.
24 P2.4/CA1/TA2 bidirectional General purpose digital I/O with Timer_A compare Out2 output or Comparator_A input.
25 P2.5/ROSC/CA5 bidirectional General purpose digital I/O with external resistor input for DCO frequency definition or Comparator_A input.
26 P2.6/ADC12CLK/CA6 bidirectional General purpose digital I/O with 12-bit ADC conversion clock or Comparator_A input.
27 P2.7/TA0/CA7 bidirectional General purpose digital I/O with Timer_A compare Out0 output or Comparator_A input.
28 P3.0/UCB0STE/UCA0CLK bidirectional General purpose digital I/O with USCI_B0 slave transmit enable or USCI_A0 clock input/output.
29 P3.1/UCB0SIMO/UCB0SDA bidirectional General purpose digital I/O with USCI_B0 SPI slave input/master output or I2C SDA data.
30 P3.2/UCB0SOMI/UCB0SCL bidirectional General purpose digital I/O with USCI_B0 SPI slave output/master input or I2C SCL clock.
31 P3.3/UCB0CLK/UCA0STE bidirectional General purpose digital I/O with USCI_B0 clock input/output or USCI_A0 slave transmit enable.
32 P3.4/UCA0TXD/UCA0SIMO bidirectional General purpose digital I/O with USCI_A0 UART transmit data output or SPI slave input/master output.
33 P3.5/UCA0RXD/UCA0SOMI bidirectional General purpose digital I/O with USCI_A0 UART receive data input or SPI slave output/master input.
34 P3.6/UCA1TXD/UCA1SIMO bidirectional General purpose digital I/O with USCI_A1 UART transmit data output or SPI slave input/master output.
35 P3.7/UCA1RXD/UCA1SOMI bidirectional General purpose digital I/O with USCI_A1 UART receive data input or SPI slave output/master input.
36 P4.0/TB0 bidirectional General purpose digital I/O with Timer_B capture CCI0A/B input or compare Out0 output.
37 P4.1/TB1 bidirectional General purpose digital I/O with Timer_B capture CCI1A/B input or compare Out1 output.
38 P4.2/TB2 bidirectional General purpose digital I/O with Timer_B capture CCI2A/B input or compare Out2 output.
39 P4.3/TB3 bidirectional General purpose digital I/O with Timer_B capture CCI3A/B input or compare Out3 output.
40 P4.4/TB4 bidirectional General purpose digital I/O with Timer_B capture CCI4A/B input or compare Out4 output.
41 P4.5/TB5 bidirectional General purpose digital I/O with Timer_B capture CCI5A/B input or compare Out5 output.
42 P4.6/TB6 bidirectional General purpose digital I/O with Timer_B capture CCI6A input or compare Out6 output.
43 P4.7/TBCLK bidirectional General purpose digital I/O with Timer_B clock signal TBCLK input.
44 P5.0/UCB1STE/UCA1CLK bidirectional General purpose digital I/O with USCI_B1 slave transmit enable or USCI_A1 clock input/output.
45 P5.1/UCB1SIMO/UCB1SDA bidirectional General purpose digital I/O with USCI_B1 SPI slave input/master output or I2C SDA data.
46 P5.2/UCB1SOMI/UCB1SCL bidirectional General purpose digital I/O with USCI_B1 SPI slave output/master input or I2C SCL data.
47 P5.3/UCB1CLK/UCA1STE bidirectional General purpose digital I/O with USCI_B1 clock input/output or USCI_A1 slave transmit enable.
48 P5.4/MCLK bidirectional General purpose digital I/O with main system clock MCLK output.
49 P5.5/SMCLK bidirectional General purpose digital I/O with sub-system clock SMCLK output.
50 P5.6/ACLK bidirectional General purpose digital I/O with auxiliary clock ACLK output.
51 P5.7/TBOUTH/SVSOUT bidirectional General purpose digital I/O with Timer_B PWM digital output control or SVS comparator output.
52 XT2OUT output XT2 crystal oscillator output supporting frequencies 0.4MHz to 16MHz.
53 XT2IN input XT2 crystal oscillator input supporting frequencies 0.4MHz to 16MHz.
54 TDO/TDI bidirectional Test data output or programming data input terminal for JTAG device programming.
55 TDI/TCLK input Test data input or test clock input terminal with device protection fuse connected.
56 TMS input Test mode select input for device programming and testing.
57 TCK input Test clock input for device programming and bootloader activation, maximum 10MHz at 3V.
58 RST/NMI input Reset input, non-maskable interrupt input, or bootloader activation with schmitt trigger.
59 P6.0/A0 bidirectional General purpose digital I/O with analog input A0 for 12-bit ADC, input range 0V to VAVCC.
60 P6.1/A1 bidirectional General purpose digital I/O with analog input A1 for 12-bit ADC, input range 0V to VAVCC.
61 P6.2/A2 bidirectional General purpose digital I/O with analog input A2 for 12-bit ADC, input range 0V to VAVCC.
62 AVSS power_in Analog power supply ground terminal supplying return path for 12-bit ADC analog portion.
63 DVSS power_in Digital power supply ground terminal supplying return path for all digital components.
64 AVCC power_in Analog power supply voltage positive terminal supplying power to 12-bit ADC analog portion, 2.2V to 3.6V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: MSP430F247TPMR
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: msp430f247tpmr-etched.step / msp430f247tpmr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430f247tpmr.step / msp430f247tpmr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (102 pp, sha256 841108068ef96d3c, retrieved 2026-10-07, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF