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MSP430F2418TPMR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

MSP430F2418TPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVCC1 power_in Digital supply voltage, positive terminal, supplies all digital parts.
2 P6.3/A3 bidirectional General-purpose digital I/O pin; analog input A3 for 12-bit ADC.
3 P6.4/A4 bidirectional General-purpose digital I/O pin; analog input A4 for 12-bit ADC.
4 P6.5/A5 bidirectional General-purpose digital I/O pin; analog input A5 for 12-bit ADC.
5 P6.6/A6 bidirectional General-purpose digital I/O pin; analog input A6 for 12-bit ADC.
6 P6.7/A7/SVSIN bidirectional General-purpose digital I/O pin; analog input A7 for 12-bit ADC; SVS input.
7 VREF+ power_out Output of positive terminal of the reference voltage in the ADC12.
8 XIN input Input port for crystal oscillator XT1; standard or watch crystals can be connected.
9 XOUT output Output port for crystal oscillator XT1; standard or watch crystals can be connected.
10 VeREF+ input Input for an external reference voltage.
11 VREF-/VeREF- input Negative terminal for the reference voltage for both sources, the internal reference voltage or an external applied reference voltage.
12 P1.0/TACLK/CAOUT bidirectional General-purpose digital I/O pin; Timer_A clock signal TACLK input; Comparator_A output.
13 P1.1/TA0 bidirectional General-purpose digital I/O pin; Timer_A capture: CCI0A input, compare: Out0 output; BSL transmit.
14 P1.2/TA1 bidirectional General-purpose digital I/O pin; Timer_A capture: CCI1A input, compare: Out1 output.
15 P1.3/TA2 bidirectional General-purpose digital I/O pin; Timer_A capture: CCI2A input, compare: Out2 output.
16 P1.4/SMCLK bidirectional General-purpose digital I/O pin; SMCLK signal output.
17 P1.5/TA0 bidirectional General-purpose digital I/O pin; Timer_A compare: Out0 output.
18 P1.6/TA1 bidirectional General-purpose digital I/O pin; Timer_A compare: Out1 output.
19 P1.7/TA2 bidirectional General-purpose digital I/O pin; Timer_A compare: Out2 output.
20 P2.0/ACLK/CA2 bidirectional General-purpose digital I/O pin; ACLK output; Comparator_A input.
21 P2.1/TAINCLK/CA3 bidirectional General-purpose digital I/O pin; Timer_A clock signal at INCLK; Comparator_A input.
22 P2.2/CAOUT/TA0/CA4 bidirectional General-purpose digital I/O pin; Timer_A capture: CCI0B input; Comparator_A output; BSL receive; Comparator_A input.
23 P2.3/CA0/TA1 bidirectional General-purpose digital I/O pin; Timer_A compare: Out1 output; Comparator_A input.
24 P2.4/CA1/TA2 bidirectional General-purpose digital I/O pin; Timer_A compare: Out2 output; Comparator_A input.
25 P2.5/ROSC/CA5 bidirectional General-purpose digital I/O pin; input for external resistor defining the DCO nominal frequency; Comparator_A input.
26 P2.6/ADC12CLK/CA6 bidirectional General-purpose digital I/O pin; conversion clock for 12-bit ADC; Comparator_A input.
27 P2.7/TA0/CA7 bidirectional General-purpose digital I/O pin; Timer_A compare: Out0 output; Comparator_A input.
28 P3.0/UCB0STE/UCA0CLK bidirectional General-purpose digital I/O pin; USCI_B0 slave transmit enable; USCI_A0 clock input/output.
29 P3.1/UCB0SIMO/UCB0SDA bidirectional General-purpose digital I/O pin; USCI_B0 slave in master out for SPI mode; USCI_B0 SDA I2C data in I2C mode.
30 P3.2/UCB0SOMI/UCB0SCL bidirectional General-purpose digital I/O pin; USCI_B0 slave out master in for SPI mode; USCI_B0 SCL I2C clock in I2C mode.
31 P3.3/UCB0CLK/UCA0STE bidirectional General-purpose digital I/O; USCI_B0 clock input/output; USCI_A0 slave transmit enable.
32 P3.4/UCA0TXD/UCA0SIMO bidirectional General-purpose digital I/O pin; USCI_A transmit data output in UART mode; USCI_A slave data in/master out for SPI mode.
33 P3.5/UCA0RXD/UCA0SOMI bidirectional General-purpose digital I/O pin; USCI_A0 receive data input in UART mode; USCI_A0 slave data out/master in for SPI mode.
34 P3.6/UCA1TXD/UCA1SIMO bidirectional General-purpose digital I/O pin; USCI_A1 transmit data output in UART mode; USCI_A1 slave data in/master out for SPI mode.
35 P3.7/UCA1RXD/UCA1SOMI bidirectional General-purpose digital I/O pin; USCI_A1 receive data input in UART mode; USCI_A1 slave data out/master in for SPI mode.
36 P4.0/TB0 bidirectional General-purpose digital I/O pin; Timer_B capture: CCI0A/B input, compare: Out0 output.
37 P4.1/TB1 bidirectional General-purpose digital I/O pin; Timer_B capture: CCI1A/B input, compare: Out1 output.
38 P4.2/TB2 bidirectional General-purpose digital I/O pin; Timer_B capture: CCI2A/B input, compare: Out2 output.
39 P4.3/TB3 bidirectional General-purpose digital I/O pin; Timer_B capture: CCI3A/B input, compare: Out3 output.
40 P4.4/TB4 bidirectional General-purpose digital I/O pin; Timer_B capture: CCI4A/B input, compare: Out4 output.
41 P4.5/TB5 bidirectional General-purpose digital I/O pin; Timer_B capture: CCI5A/B input, compare: Out5 output.
42 P4.6/TB6 bidirectional General-purpose digital I/O pin; Timer_B capture: CCI6A input, compare: Out6 output.
43 P4.7/TBCLK bidirectional General-purpose digital I/O pin; Timer_B clock signal TBCLK input.
44 P5.0/UCB1STE/UCA1CLK bidirectional General-purpose digital I/O pin; USCI_B1 slave transmit enable; USCI_A1 clock input/output.
45 P5.1/UCB1SIMO/UCB1SDA bidirectional General-purpose digital I/O pin; USCI_B1 slave in master out for SPI mode; USCI_B1 SDA I2C data in I2C mode.
46 P5.2/UCB1SOMI/UCB1SCL bidirectional General-purpose digital I/O pin; USCI_B1 slave out master in for SPI mode; USCI_B1 SCL I2C clock in I2C mode.
47 P5.3/UCB1CLK/UCA1STE bidirectional General-purpose digital I/O; USCI_B1 clock input/output; USCI_A1 slave transmit enable.
48 P5.4/MCLK bidirectional General-purpose digital I/O pin; main system clock MCLK output.
49 P5.5/SMCLK bidirectional General-purpose digital I/O pin; submain system clock SMCLK output.
50 P5.6/ACLK bidirectional General-purpose digital I/O pin; auxiliary clock ACLK output.
51 P5.7/TBOUTH/SVSOUT bidirectional General-purpose digital I/O pin; switch all PWM digital output ports to high impedance (Timer_B TB0 to TB6); SVS comparator output.
52 DVCC2 power_in Digital supply voltage, positive terminal, supplies all digital parts.
53 DVSS2 power_in Digital supply voltage, negative terminal, supplies all digital parts.
54 TDO/TDI bidirectional Test data output port or programming data input terminal.
55 TDI/TCLK input Test data input or test clock input; the device protection fuse is connected to TDI/TCLK.
56 TMS input Test mode select; used as an input port for device programming and test.
57 TCK input Test clock (JTAG); TCK is the clock input port for device programming test and bootloader start.
58 RST/NMI input Reset input, nonmaskable interrupt input port, or bootloader start (in flash devices).
59 P6.0/A0 bidirectional General-purpose digital I/O pin; analog input A0 for 12-bit ADC.
60 P6.1/A1 bidirectional General-purpose digital I/O pin; analog input A1 for 12-bit ADC.
61 P6.2/A2 bidirectional General-purpose digital I/O pin; analog input A2 for 12-bit ADC.
62 AVSS power_in Analog supply voltage, negative terminal, supplies only the analog portion of ADC12 and DAC12.
63 DVSS1 power_in Digital supply voltage, negative terminal, supplies all digital parts.
64 AVCC power_in Analog supply voltage, positive terminal, supplies only the analog portion of ADC12 and DAC12.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: MSP430F2418TPMR
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: msp430f2418tpmr-etched.step / msp430f2418tpmr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430f2418tpmr.step / msp430f2418tpmr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (124 pp, sha256 9b29f7507412f2ce, retrieved 2026-09-29, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF