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Contents

README

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MSP430F2350TRHAR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · VQFN-40-EP(6x6)

MSP430F2350TRHAR from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DVCC power_in Digital supply voltage, positive terminal, supplying all digital parts; the device operates over a 1.8 V to 3.6 V supply range.
2 XIN/P2.6/CA6 bidirectional Input terminal of the crystal oscillator, also general-purpose digital I/O P2.6 and Comparator_A input CA6.
3 XOUT/P2.7/CA7 bidirectional Output terminal of the crystal oscillator, also general-purpose digital I/O P2.7 and Comparator_A input CA7.
4 P1.0/TACLK bidirectional General-purpose digital I/O pin, also Timer_A clock signal TACLK input.
5 P1.1/TA0 bidirectional General-purpose digital I/O pin; Timer_A capture input CCI0A or compare output Out0; also the BSL data transmit pin.
6 P1.2/TA1 bidirectional General-purpose digital I/O pin; Timer_A capture input CCI1A or compare output Out1.
7 P1.3/TA2 bidirectional General-purpose digital I/O pin; Timer_A capture input CCI2A or compare output Out2.
8 P1.4/SMCLK bidirectional General-purpose digital I/O pin, also SMCLK signal output.
9 P1.5/TA0 bidirectional General-purpose digital I/O pin; Timer_A compare output Out0.
10 P1.6/TA1 bidirectional General-purpose digital I/O pin; Timer_A compare output Out1.
11 P1.7/TA2 bidirectional General-purpose digital I/O pin; Timer_A compare output Out2.
12 P2.0/ACLK/CA2 bidirectional General-purpose digital I/O pin, also ACLK output and Comparator_A input CA2.
13 P2.1/TAINCLK/CA3 bidirectional General-purpose digital I/O pin, also Timer_A clock input INCLK and Comparator_A input CA3.
14 P2.2/CAOUT/TA0/CA4 bidirectional General-purpose digital I/O pin, also Comparator_A output CAOUT, Timer_A capture input CCI0B and Comparator_A input CA4; also the BSL data receive pin.
15 P2.3/CA0/TA1 bidirectional General-purpose digital I/O pin, also Comparator_A input CA0 and Timer_A compare output Out1.
16 P2.4/CA1/TA2 bidirectional General-purpose digital I/O pin, also Comparator_A input CA1 and Timer_A compare output Out2.
17 P2.5/ROSC/CA5 bidirectional General-purpose digital I/O pin; input for the external resistor that defines the DCO nominal frequency; also Comparator_A input CA5.
18 P3.0/UCB0STE/UCA0CLK bidirectional General-purpose digital I/O pin; USCI_B0 slave transmit enable, or USCI_A0 clock input/output.
19 P3.1/UCB0SIMO/UCB0SDA bidirectional General-purpose digital I/O pin; USCI_B0 slave in/master out in SPI mode, or I2C data UCB0SDA in I2C mode.
20 P3.2/UCB0SOMI/UCB0SCL bidirectional General-purpose digital I/O pin; USCI_B0 slave out/master in in SPI mode, or I2C clock UCB0SCL in I2C mode.
21 P3.3/UCB0CLK/UCA0STE bidirectional General-purpose digital I/O pin; USCI_B0 clock input/output, or USCI_A0 slave transmit enable.
22 P3.4/UCA0TXD/UCA0SIMO bidirectional General-purpose digital I/O pin; USCI_A0 transmit data output in UART mode, or slave data in/master out in SPI mode.
23 P3.5/UCA0RXD/UCA0SOMI bidirectional General-purpose digital I/O pin; USCI_A0 receive data input in UART mode, or slave data out/master in in SPI mode.
24 P3.6 bidirectional General-purpose digital I/O pin.
25 P3.7 bidirectional General-purpose digital I/O pin.
26 P4.0/TB0 bidirectional General-purpose digital I/O pin; Timer_B capture input CCI0A or compare output Out0.
27 P4.1/TB1 bidirectional General-purpose digital I/O pin; Timer_B capture input CCI1A or compare output Out1.
28 P4.2/TB2 bidirectional General-purpose digital I/O pin; Timer_B capture input CCI2A or compare output Out2.
29 P4.3/TB0 bidirectional General-purpose digital I/O pin; Timer_B capture input CCI0B or compare output Out0.
30 P4.4/TB1 bidirectional General-purpose digital I/O pin; Timer_B capture input CCI1B or compare output Out1.
31 P4.5/TB2 bidirectional General-purpose digital I/O pin; Timer_B compare output Out2.
32 P4.6/TBOUTH/ACLK bidirectional General-purpose digital I/O pin; can switch all PWM digital outputs to high impedance, Timer_B TBOUTH function, or ACLK output.
33 P4.7/TBCLK bidirectional General-purpose digital I/O pin; input clock TBCLK for Timer_B.
34 TDO/TDI bidirectional Test data output port; TDO/TDI data output or programming data input terminal.
35 TDI/TCLK input Test data input or test clock input; the device protection fuse is connected to this pin.
36 TMS input Test mode select; used as an input port for device programming and test.
37 TCK input Test clock; the clock input port for device programming and test.
38 RST/NMI input Reset input or nonmaskable interrupt input port.
39 D/AVSS power_in Digital and analog supply voltage, negative terminal (ground).
40 AVCC power_in Analog supply voltage, positive terminal.
41 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-40-EP(6x6)
Category Embedded Processors & Controllers
Pins 41

CAD (KiCad official)

  • Symbol: MSP430F2350TRHAR
  • Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
  • 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)
  • 3D model files: msp430f2350trhar-etched.step / msp430f2350trhar-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); msp430f2350trhar.step / msp430f2350trhar.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (76 pp, sha256 825d28928a478f0c, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF